diff --git a/repos/base/mk/spec/arm_v8a.mk b/repos/base/mk/spec/arm_v8a.mk
index 6f93398c18..df9d118886 100644
--- a/repos/base/mk/spec/arm_v8a.mk
+++ b/repos/base/mk/spec/arm_v8a.mk
@@ -1,4 +1,4 @@
-SPECS       += arm_v8 arm_64 64bit
+SPECS       += arm_v8 arm_64 64bit neon
 REP_INC_DIR += include/spec/arm_v8
 REP_INC_DIR += include/spec/arm_64
 
diff --git a/repos/libports/lib/mk/spec/arm/libcrypto.mk b/repos/libports/lib/mk/spec/arm/libcrypto.mk
index 505f1c2416..12ad5fe259 100644
--- a/repos/libports/lib/mk/spec/arm/libcrypto.mk
+++ b/repos/libports/lib/mk/spec/arm/libcrypto.mk
@@ -6,7 +6,7 @@ CC_OPT += -DSHA1_ASM -DSHA256_ASM -DSHA512_ASM -DKECCAK1600_ASM -DAES_ASM
 CC_OPT += -DGHASH_ASM -DECP_NISTZ256_ASM -DPOLY1305_ASM
 
 SRC_C = \
-	armcap.c \
+	armcap_genode.c \
 	bf/bf_enc.c \
 	bn/bn_asm.c \
 	camellia/cmll_cbc.c \
@@ -33,6 +33,12 @@ SRC_S = \
 
 vpath %.S $(call select_from_ports,openssl)/src/lib/openssl/crypto
 
+ifeq ($(filter-out $(SPECS),neon),)
+	vpath armcap_genode.c $(REP_DIR)/src/lib/openssl/crypto/spec/neon
+else
+	vpath armcap_genode.c $(REP_DIR)/src/lib/openssl/crypto/spec/arm
+endif
+
 include $(REP_DIR)/lib/mk/libcrypto.inc
 
 CC_CXX_WARN_STRICT =
diff --git a/repos/libports/lib/mk/spec/arm_64/libcrypto.mk b/repos/libports/lib/mk/spec/arm_64/libcrypto.mk
index 560d78b68c..a82c6de822 100644
--- a/repos/libports/lib/mk/spec/arm_64/libcrypto.mk
+++ b/repos/libports/lib/mk/spec/arm_64/libcrypto.mk
@@ -6,7 +6,7 @@ CC_OPT += -DSHA512_ASM -DKECCAK1600_ASM -DVPAES_ASM -DECP_NISTZ256_ASM
 CC_OPT += -DPOLY1305_ASM
 
 SRC_C = \
-	armcap.c \
+	armcap_genode.c \
 	aes/aes_core.c \
 	bf/bf_enc.c \
 	bn/bn_asm.c \
@@ -32,6 +32,12 @@ SRC_S = \
 
 vpath %.S $(call select_from_ports,openssl)/src/lib/openssl/crypto
 
+ifeq ($(filter-out $(SPECS),neon),)
+	vpath armcap_genode.c $(REP_DIR)/src/lib/openssl/crypto/spec/neon
+else
+	vpath armcap_genode.c $(REP_DIR)/src/lib/openssl/crypto/spec/arm
+endif
+
 include $(REP_DIR)/lib/mk/libcrypto.inc
 
 CC_CXX_WARN_STRICT =
diff --git a/repos/libports/ports/openssl.hash b/repos/libports/ports/openssl.hash
index af693f6cc5..68bd7ea846 100644
--- a/repos/libports/ports/openssl.hash
+++ b/repos/libports/ports/openssl.hash
@@ -1 +1 @@
-76f11202782ecc6ea2342346bd70fe45960c1d66
+69864664449bcdbee8dc08f4bbce08a66ca22e6f
diff --git a/repos/libports/src/lib/openssl/crypto.patch b/repos/libports/src/lib/openssl/crypto.patch
index 62371b330b..8eac9370b3 100644
--- a/repos/libports/src/lib/openssl/crypto.patch
+++ b/repos/libports/src/lib/openssl/crypto.patch
@@ -32,19 +32,6 @@
  open OUT,"| \"$^X\" \"$xlate\" $flavour \"$output\"";
  *STDOUT=*OUT;
  
---- a/src/lib/openssl/crypto/armcap.c
-+++ b/src/lib/openssl/crypto/armcap.c
-@@ -114,6 +114,10 @@
-         return;
-     }
- 
-+    /* Genode: only NEON for now */
-+    //OPENSSL_armcap_P |= ARMV7_NEON;
-+    return;
-+
- # if defined(__APPLE__) && !defined(__aarch64__)
-     /*
-      * Capability probing by catching SIGILL appears to be problematic
 --- a/src/lib/openssl/crypto/bn/asm/rsaz-avx2.pl
 +++ b/src/lib/openssl/crypto/bn/asm/rsaz-avx2.pl
 @@ -54,6 +54,8 @@
diff --git a/repos/libports/src/lib/openssl/crypto/spec/arm/armcap_genode.c b/repos/libports/src/lib/openssl/crypto/spec/arm/armcap_genode.c
new file mode 100644
index 0000000000..962002c275
--- /dev/null
+++ b/repos/libports/src/lib/openssl/crypto/spec/arm/armcap_genode.c
@@ -0,0 +1,22 @@
+/*
+ * \brief  OpenSSL ARM CPU capabilities (no NEON)
+ * \author Pirmin Duss
+ * \date   2021-02-17
+ */
+
+/*
+ * Copyright (C) 2021 Genode Labs GmbH
+ *
+ * This file is part of the Genode OS framework, which is distributed
+ * under the terms of the GNU Affero General Public License version 3.
+ */
+
+
+#include <stdint.h>
+
+
+unsigned int OPENSSL_armcap_P = 0;
+
+void OPENSSL_cpuid_setup(void) { }
+
+uint32_t OPENSSL_rdtsc(void) { return 0; }
diff --git a/repos/libports/src/lib/openssl/crypto/spec/neon/armcap_genode.c b/repos/libports/src/lib/openssl/crypto/spec/neon/armcap_genode.c
new file mode 100644
index 0000000000..09c1d9de07
--- /dev/null
+++ b/repos/libports/src/lib/openssl/crypto/spec/neon/armcap_genode.c
@@ -0,0 +1,23 @@
+/*
+ * \brief  OpenSSL ARM CPU capabilities (with NEON support)
+ * \author Pirmin Duss
+ * \date   2021-02-17
+ */
+
+/*
+ * Copyright (C) 2021 Genode Labs GmbH
+ *
+ * This file is part of the Genode OS framework, which is distributed
+ * under the terms of the GNU Affero General Public License version 3.
+ */
+
+
+#include <stdint.h>
+#include "arm_arch.h"
+
+
+unsigned int OPENSSL_armcap_P = ARMV7_NEON;
+
+void OPENSSL_cpuid_setup(void) { }
+
+uint32_t OPENSSL_rdtsc(void) { return 0; }