From 3a40c27c26aa50aee457cbb0df90cca3efbf4a27 Mon Sep 17 00:00:00 2001 From: Martin Stein Date: Mon, 16 Feb 2015 11:35:06 +0100 Subject: [PATCH] hw_vea9x4: quickfix slow RAM access Setting the ACTLR.SMP bit also without SMP support fastens RAM access significantly. A proper solution would implement SMP support which must enable the bit anyway. Fixes #1353 --- repos/base-hw/lib/mk/platform_vea9x4/core.mk | 1 + .../src/core/include/spec/cortex_a9/cpu.h | 18 ++++++++++++ .../src/core/include/spec/vea9x4/board.h | 2 +- repos/base-hw/src/core/spec/vea9x4/board.cc | 29 +++++++++++++++++++ 4 files changed, 49 insertions(+), 1 deletion(-) create mode 100644 repos/base-hw/src/core/spec/vea9x4/board.cc diff --git a/repos/base-hw/lib/mk/platform_vea9x4/core.mk b/repos/base-hw/lib/mk/platform_vea9x4/core.mk index 7d7a4d56aa..822c9f963d 100644 --- a/repos/base-hw/lib/mk/platform_vea9x4/core.mk +++ b/repos/base-hw/lib/mk/platform_vea9x4/core.mk @@ -13,6 +13,7 @@ INC_DIR += $(REP_DIR)/src/core/include/spec/pl011 # add C++ sources SRC_CC += platform_services.cc SRC_CC += spec/vea9x4/platform_support.cc +SRC_CC += spec/vea9x4/board.cc SRC_CC += spec/cortex_a9/pic.cc SRC_CC += spec/arm_gic/pic.cc diff --git a/repos/base-hw/src/core/include/spec/cortex_a9/cpu.h b/repos/base-hw/src/core/include/spec/cortex_a9/cpu.h index 07ce35890e..03acacf0c1 100644 --- a/repos/base-hw/src/core/include/spec/cortex_a9/cpu.h +++ b/repos/base-hw/src/core/include/spec/cortex_a9/cpu.h @@ -213,6 +213,24 @@ class Genode::Cpu : public Arm_v7 public: + /** + * Auxiliary Control Register + */ + struct Actlr : Register<32> + { + struct Smp : Bitfield<6, 1> { }; + + static access_t read() + { + access_t v; + asm volatile ("mrc p15, 0, %0, c1, c0, 1" : "=r" (v) :: ); + return v; + } + + static void write(access_t const v) { + asm volatile ("mcr p15, 0, %0, c1, c0, 1" :: "r" (v) : ); } + }; + enum { /* interrupt controller */ diff --git a/repos/base-hw/src/core/include/spec/vea9x4/board.h b/repos/base-hw/src/core/include/spec/vea9x4/board.h index e06a00e2ac..dc1506dbb5 100644 --- a/repos/base-hw/src/core/include/spec/vea9x4/board.h +++ b/repos/base-hw/src/core/include/spec/vea9x4/board.h @@ -25,7 +25,7 @@ namespace Genode static void outer_cache_invalidate() { } static void outer_cache_flush() { } - static void prepare_kernel() { } + static void prepare_kernel(); static void secondary_cpus_ip(void * const ip) { } /** diff --git a/repos/base-hw/src/core/spec/vea9x4/board.cc b/repos/base-hw/src/core/spec/vea9x4/board.cc new file mode 100644 index 0000000000..d2e33dbafa --- /dev/null +++ b/repos/base-hw/src/core/spec/vea9x4/board.cc @@ -0,0 +1,29 @@ +/* + * \brief Board driver for core + * \author Martin Stein + * \date 2015-02-16 + */ + +/* + * Copyright (C) 2012-2015 Genode Labs GmbH + * + * This file is part of the Genode OS framework, which is distributed + * under the terms of the GNU General Public License version 2. + */ + +/* core includes */ +#include + +using namespace Genode; + + +void Board::prepare_kernel() +{ + /** + * FIXME We enable this bit although base-hw doesn't support + * SMP because it fastens RAM access significantly. + */ + Cpu::Actlr::access_t actlr = Cpu::Actlr::read(); + Cpu::Actlr::Smp::set(actlr, 1); + Cpu::Actlr::write(actlr); +}