diff --git a/repos/os/src/drivers/framebuffer/spec/pl11x/main.cc b/repos/os/src/drivers/framebuffer/spec/pl11x/main.cc index ae30dac742..e19f8f4645 100644 --- a/repos/os/src/drivers/framebuffer/spec/pl11x/main.cc +++ b/repos/os/src/drivers/framebuffer/spec/pl11x/main.cc @@ -13,22 +13,22 @@ */ /* Genode includes */ -#include -#include -#include +#include +#include +#include +#include #include -#include #include #include #include #include -#include #include +#include +#include /* device configuration */ #include #include -#include /*********************************************** @@ -52,181 +52,164 @@ namespace Framebuffer FRAMEBUFFER_SIZE = SCR_WIDTH*SCR_HEIGHT*BYTES_PER_PIXEL, }; - class Session_component : public Genode::Rpc_object - { - private: + class Session_component; - Genode::Dataspace_capability _fb_ds_cap; - Genode::Dataspace_client _fb_ds; - Genode::addr_t _regs_base; - Genode::addr_t _sys_regs_base; - Timer::Connection _timer; + using namespace Genode; + class Main; +} - enum { - /** - * Bit definitions of the lcd control register - */ - CTRL_ENABLED = 1 << 0, - CTRL_BPP16 = 4 << 1, - CTRL_BPP16_565 = 6 << 1, - CTRL_TFT = 1 << 5, - CTRL_BGR = 1 << 8, - CTRL_POWER = 1 << 11, - CTRL_VCOMP = 1 << 12, +class Framebuffer::Session_component : public Genode::Rpc_object +{ + private: - /** - * Bit definitions for CLCDC timing. - */ - CLCDC_IVS = 1 << 11, - CLCDC_IHS = 1 << 12, - CLCDC_BCD = 1 << 26, - }; + Genode::Dataspace_capability _fb_ds_cap; + Genode::Dataspace_client _fb_ds; + Genode::addr_t _regs_base; + Genode::addr_t _sys_regs_base; + Timer::Connection _timer; - void sys_reg_write(unsigned reg, long value) { - *(volatile long *)(_sys_regs_base + sizeof(long)*reg) = value; } - - long sys_reg_read(unsigned reg) { - return *(volatile long *)(_sys_regs_base + sizeof(long)*reg); } - - void reg_write(unsigned reg, long value) { - *(volatile long *)(_regs_base + sizeof(long)*reg) = value; } - - long reg_read(unsigned reg) { - return *(volatile long *)(_regs_base + sizeof(long)*reg); } - - public: + enum { + /** + * Bit definitions of the lcd control register + */ + CTRL_ENABLED = 1 << 0, + CTRL_BPP16 = 4 << 1, + CTRL_BPP16_565 = 6 << 1, + CTRL_TFT = 1 << 5, + CTRL_BGR = 1 << 8, + CTRL_POWER = 1 << 11, + CTRL_VCOMP = 1 << 12, /** - * Constructor + * Bit definitions for CLCDC timing. */ - Session_component(void *regs_base, void *sys_regs_base, - Genode::Dataspace_capability fb_ds_cap) - : _fb_ds_cap(fb_ds_cap), _fb_ds(_fb_ds_cap), - _regs_base((Genode::addr_t)regs_base), - _sys_regs_base((Genode::addr_t)sys_regs_base) - { - using namespace Genode; + CLCDC_IVS = 1 << 11, + CLCDC_IHS = 1 << 12, + CLCDC_BCD = 1 << 26, + }; - uint32_t tim0 = (SCR_WIDTH/16 - 1) << 2 - | (HSYNC_LEN - 1) << 8 - | (RIGHT_MARGIN - 1) << 16 - | (LEFT_MARGIN - 1) << 24; - uint32_t tim1 = (SCR_HEIGHT - 1) - | (VSYNC_LEN - 1) << 10 - | LOWER_MARGIN << 16 - | UPPER_MARGIN << 24; - uint32_t tim2 = ((SCR_WIDTH - 1) << 16) - | CLCDC_IVS | CLCDC_IHS | CLCDC_BCD; - uint32_t tim3 = 0; - uint32_t ctrl = reg_read(PL11X_REG_CTRL); + void sys_reg_write(unsigned reg, long value) { + *(volatile long *)(_sys_regs_base + sizeof(long)*reg) = value; } - /* reset video if already enabled */ - if (ctrl & CTRL_POWER) { - ctrl &= ~CTRL_POWER; - reg_write(PL11X_REG_CTRL, ctrl); - _timer.msleep(100); - } - if (ctrl & CTRL_ENABLED) { - ctrl &= ~CTRL_ENABLED; - reg_write(PL11X_REG_CTRL, ctrl); - _timer.msleep(100); - } + long sys_reg_read(unsigned reg) { + return *(volatile long *)(_sys_regs_base + sizeof(long)*reg); } - ctrl = CTRL_BGR | CTRL_ENABLED | CTRL_TFT | CTRL_VCOMP | CTRL_BPP16_565; + void reg_write(unsigned reg, long value) { + *(volatile long *)(_regs_base + sizeof(long)*reg) = value; } - /* init color-lcd oscillator */ - sys_reg_write(SP810_REG_LOCK, 0xa05f); - sys_reg_write(SP810_REG_OSCCLCD, 0x2c77); - sys_reg_write(SP810_REG_LOCK, 0); + long reg_read(unsigned reg) { + return *(volatile long *)(_regs_base + sizeof(long)*reg); } - /* init video timing */ - reg_write(PL11X_REG_TIMING0, tim0); - reg_write(PL11X_REG_TIMING1, tim1); - reg_write(PL11X_REG_TIMING2, tim2); - reg_write(PL11X_REG_TIMING3, tim3); + public: - /* set framebuffer address and ctrl register */ - reg_write(PL11X_REG_UPBASE, _fb_ds.phys_addr()); - reg_write(PL11X_REG_LPBASE, 0); - reg_write(PL11X_REG_IMSC, 0); - reg_write(PL11X_REG_CTRL, ctrl); + /** + * Constructor + */ + Session_component(Genode::Env &env, + void *regs_base, void *sys_regs_base, + Genode::Dataspace_capability fb_ds_cap) + : _fb_ds_cap(fb_ds_cap), _fb_ds(_fb_ds_cap), + _regs_base((Genode::addr_t)regs_base), + _sys_regs_base((Genode::addr_t)sys_regs_base), + _timer(env) + { + using namespace Genode; + + uint32_t tim0 = (SCR_WIDTH/16 - 1) << 2 + | (HSYNC_LEN - 1) << 8 + | (RIGHT_MARGIN - 1) << 16 + | (LEFT_MARGIN - 1) << 24; + uint32_t tim1 = (SCR_HEIGHT - 1) + | (VSYNC_LEN - 1) << 10 + | LOWER_MARGIN << 16 + | UPPER_MARGIN << 24; + uint32_t tim2 = ((SCR_WIDTH - 1) << 16) + | CLCDC_IVS | CLCDC_IHS | CLCDC_BCD; + uint32_t tim3 = 0; + uint32_t ctrl = reg_read(PL11X_REG_CTRL); + + /* reset video if already enabled */ + if (ctrl & CTRL_POWER) { + ctrl &= ~CTRL_POWER; + reg_write(PL11X_REG_CTRL, ctrl); + _timer.msleep(100); + } + if (ctrl & CTRL_ENABLED) { + ctrl &= ~CTRL_ENABLED; + reg_write(PL11X_REG_CTRL, ctrl); _timer.msleep(100); - - /* power on */ - reg_write(PL11X_REG_CTRL, ctrl | CTRL_POWER); } - Genode::Dataspace_capability dataspace() override { return _fb_ds_cap; } + ctrl = CTRL_BGR | CTRL_ENABLED | CTRL_TFT | CTRL_VCOMP | CTRL_BPP16_565; - Mode mode() const override { return Mode(SCR_WIDTH, SCR_HEIGHT, Mode::RGB565); } + /* init color-lcd oscillator */ + sys_reg_write(SP810_REG_LOCK, 0xa05f); + sys_reg_write(SP810_REG_OSCCLCD, 0x2c77); + sys_reg_write(SP810_REG_LOCK, 0); - void mode_sigh(Genode::Signal_context_capability) override { } + /* init video timing */ + reg_write(PL11X_REG_TIMING0, tim0); + reg_write(PL11X_REG_TIMING1, tim1); + reg_write(PL11X_REG_TIMING2, tim2); + reg_write(PL11X_REG_TIMING3, tim3); - void sync_sigh(Genode::Signal_context_capability sigh) override - { - _timer.sigh(sigh); - _timer.trigger_periodic(10*1000); - } + /* set framebuffer address and ctrl register */ + reg_write(PL11X_REG_UPBASE, _fb_ds.phys_addr()); + reg_write(PL11X_REG_LPBASE, 0); + reg_write(PL11X_REG_IMSC, 0); + reg_write(PL11X_REG_CTRL, ctrl); + _timer.msleep(100); - void refresh(int x, int y, int w, int h) override { } - }; + /* power on */ + reg_write(PL11X_REG_CTRL, ctrl | CTRL_POWER); + } + + Genode::Dataspace_capability dataspace() override { return _fb_ds_cap; } + + Mode mode() const override { return Mode(SCR_WIDTH, SCR_HEIGHT, Mode::RGB565); } + + void mode_sigh(Genode::Signal_context_capability) override { } + + void sync_sigh(Genode::Signal_context_capability sigh) override + { + _timer.sigh(sigh); + _timer.trigger_periodic(10*1000); + } + + void refresh(int x, int y, int w, int h) override { } +}; - class Root : public Genode::Root_component - { - private: - - void *_lcd_regs_base; - void *_sys_regs_base; - Genode::Dataspace_capability _fb_ds_cap; - - protected: - - Session_component *_create_session(const char *args) override { - return new (md_alloc()) Session_component(_lcd_regs_base, - _sys_regs_base, - _fb_ds_cap); } - - public: - - Root(Genode::Rpc_entrypoint *session_ep, Genode::Allocator *md_alloc, - void *lcd_regs_base, void *sys_regs_base, - Genode::Dataspace_capability fb_ds_cap) - : Genode::Root_component(session_ep, md_alloc), - _lcd_regs_base(lcd_regs_base), _sys_regs_base(sys_regs_base), - _fb_ds_cap(fb_ds_cap) { } - }; -} - - -using namespace Genode; - -int main(int, char **) +struct Framebuffer::Main { - printf("--- pl11x framebuffer driver ---\n"); + Env &_env; + Entrypoint &_ep; + + Heap _heap { _env.ram(), _env.rm() }; /* locally map LCD control registers */ - Io_mem_connection lcd_io_mem(PL11X_LCD_PHYS, PL11X_LCD_SIZE); - void *lcd_base = env()->rm_session()->attach(lcd_io_mem.dataspace()); + Io_mem_connection _lcd_io_mem { _env, PL11X_LCD_PHYS, PL11X_LCD_SIZE }; + void * _lcd_base { _env.rm().attach(_lcd_io_mem.dataspace()) }; /* locally map system control registers */ - Io_mem_connection sys_mem(SP810_PHYS, SP810_SIZE); - void *sys_base = env()->rm_session()->attach(sys_mem.dataspace()); + Io_mem_connection _sys_mem { SP810_PHYS, SP810_SIZE }; + void * _sys_base { _env.rm().attach(_sys_mem.dataspace()) }; - enum { STACK_SIZE = 4096 }; - static Cap_connection cap; - static Rpc_entrypoint ep(&cap, STACK_SIZE, "fb_ep"); + Dataspace_capability _fb_ds_cap { _env.ram().alloc(Framebuffer::FRAMEBUFFER_SIZE) }; + Session_component _fb_session { _env, _lcd_base, _sys_base, _fb_ds_cap }; + Static_root _fb_root { _ep.manage(_fb_session) }; - Dataspace_capability fb_ds_cap = - Framebuffer::alloc_video_memory(Framebuffer::FRAMEBUFFER_SIZE); + Main(Env &env) : _env(env), _ep(_env.ep()) + { + log("--- pl11x framebuffer driver ---\n"); - /* - * Let the entry point serve the framebuffer and input root interfaces - */ - static Framebuffer::Root fb_root(&ep, env()->heap(), lcd_base, sys_base, fb_ds_cap); - env()->parent()->announce(ep.manage(&fb_root)); + /* announce service */ + _env.parent().announce(_ep.manage(_fb_root)); + } +}; - sleep_forever(); - return 0; +void Component::construct(Genode::Env &env) +{ + static Framebuffer::Main main(env); } diff --git a/repos/os/src/drivers/framebuffer/spec/pl11x/pbxa9/target.mk b/repos/os/src/drivers/framebuffer/spec/pl11x/pbxa9/target.mk index 9a5f32b7cb..b8ee214722 100644 --- a/repos/os/src/drivers/framebuffer/spec/pl11x/pbxa9/target.mk +++ b/repos/os/src/drivers/framebuffer/spec/pl11x/pbxa9/target.mk @@ -1,6 +1,6 @@ TARGET = fb_drv REQUIRES = pl11x pbxa9 -SRC_CC = main.cc video_memory.cc +SRC_CC = main.cc LIBS = base INC_DIR += $(PRG_DIR)/.. diff --git a/repos/os/src/drivers/framebuffer/spec/pl11x/video_memory.cc b/repos/os/src/drivers/framebuffer/spec/pl11x/video_memory.cc deleted file mode 100644 index 97053f22ed..0000000000 --- a/repos/os/src/drivers/framebuffer/spec/pl11x/video_memory.cc +++ /dev/null @@ -1,22 +0,0 @@ -/* - * \brief PL11x video memory function for platform baseboard cortex-A9. - * \author Stefan Kalkowski - * \date 2011-11-15 - */ - -/* - * Copyright (C) 2011-2013 Genode Labs GmbH - * - * This file is part of the Genode OS framework, which is distributed - * under the terms of the GNU General Public License version 2. - */ - -/* Genode includes */ -#include - -#include -#include - -Genode::Dataspace_capability Framebuffer::alloc_video_memory(Genode::size_t sz) { - return Genode::env()->ram_session()->alloc(sz); -} diff --git a/repos/os/src/drivers/framebuffer/spec/pl11x/video_memory.h b/repos/os/src/drivers/framebuffer/spec/pl11x/video_memory.h deleted file mode 100644 index 8c11276699..0000000000 --- a/repos/os/src/drivers/framebuffer/spec/pl11x/video_memory.h +++ /dev/null @@ -1,26 +0,0 @@ -/* - * \brief Video memory allocator. - * \author Stefan Kalkowski - * \date 2011-11-15 - */ - -/* - * Copyright (C) 2011-2013 Genode Labs GmbH - * - * This file is part of the Genode OS framework, which is distributed - * under the terms of the GNU General Public License version 2. - */ - -#ifndef _INCLUDE__VIDEOMEM_ALLOCATOR_H_ -#define _INCLUDE__VIDEOMEM_ALLOCATOR_H_ - -#include -#include - -namespace Framebuffer { - - Genode::Dataspace_capability alloc_video_memory(Genode::size_t size); - -} - -#endif /* _INCLUDE__VIDEOMEM_ALLOCATOR_H_ */