diff --git a/repos/os/run/nvme.run b/repos/os/run/nvme.run
index a3a7aa0f86..6f7b69fd1c 100644
--- a/repos/os/run/nvme.run
+++ b/repos/os/run/nvme.run
@@ -103,6 +103,17 @@ append config {
+
+
+
+
+
+
+
+
+
+
+
diff --git a/repos/os/src/drivers/nvme/main.cc b/repos/os/src/drivers/nvme/main.cc
index 9f1acbddab..6008b9130e 100644
--- a/repos/os/src/drivers/nvme/main.cc
+++ b/repos/os/src/drivers/nvme/main.cc
@@ -449,7 +449,8 @@ struct Nvme::Cq : Nvme::Queue
/*
* Controller
*/
-struct Nvme::Controller : public Genode::Attached_mmio
+struct Nvme::Controller : public Genode::Attached_dataspace,
+ public Genode::Mmio
{
/**********
** MMIO **
@@ -1057,10 +1058,11 @@ struct Nvme::Controller : public Genode::Attached_mmio
* Constructor
*/
Controller(Genode::Env &env, Util::Dma_allocator &dma_alloc,
- addr_t const base, size_t const size,
+ Genode::Io_mem_dataspace_capability ds_cap,
Mmio::Delayer &delayer)
:
- Genode::Attached_mmio(env, base, size),
+ Genode::Attached_dataspace(env.rm(), ds_cap),
+ Genode::Mmio((addr_t)local_addr()),
_env(env), _dma_alloc(dma_alloc), _delayer(delayer)
{ }
@@ -1528,8 +1530,8 @@ class Nvme::Driver : Genode::Noncopyable
}
try {
- _nvme_ctrlr.construct(_env, *_nvme_pci, _nvme_pci->base(),
- _nvme_pci->size(), _delayer);
+ _nvme_ctrlr.construct(_env, *_nvme_pci, _nvme_pci->io_mem_ds(),
+ _delayer);
} catch (...) {
error("could not access NVMe controller MMIO");
throw;
diff --git a/repos/os/src/drivers/nvme/pci.h b/repos/os/src/drivers/nvme/pci.h
index 5a116b979e..e6806cdccb 100644
--- a/repos/os/src/drivers/nvme/pci.h
+++ b/repos/os/src/drivers/nvme/pci.h
@@ -45,10 +45,10 @@ struct Nvme::Pci : Platform::Connection,
enum Pci_config { IRQ = 0x3c, CMD = 0x4, CMD_IO = 0x1,
CMD_MEMORY = 0x2, CMD_MASTER = 0x4 };
- Platform::Device::Resource _res { };
Platform::Device_capability _device_cap { };
Genode::Constructible _device { };
+ Io_mem_session_capability _io_mem_cap { };
Genode::Constructible _irq { };
/**
@@ -68,14 +68,13 @@ struct Nvme::Pci : Platform::Connection,
_device.construct(_device_cap);
- _res = _device->resource(NVME_BASE_ID);
-
uint16_t cmd = _device->config_read(Pci_config::CMD, Platform::Device::ACCESS_16BIT);
cmd |= 0x2; /* respond to memory space accesses */
cmd |= 0x4; /* enable bus master */
_device->config_write(Pci_config::CMD, cmd, Platform::Device::ACCESS_16BIT);
+ _io_mem_cap = _device->io_mem(_device->phys_bar_to_virt(NVME_BASE_ID));
_irq.construct(_device->irq(0));
Genode::log("NVMe PCIe controller found (",
@@ -86,12 +85,8 @@ struct Nvme::Pci : Platform::Connection,
/**
* Return base address of controller MMIO region
*/
- addr_t base() const { return _res.base(); }
-
- /**
- * Return size of controller MMIO region
- */
- size_t size() const { return _res.size(); }
+ Io_mem_dataspace_capability io_mem_ds() const {
+ return Io_mem_session_client(_io_mem_cap).dataspace(); }
/**
* Set interrupt signal handler