From 75509d77b517a5f2c18d12b58855f83e423a5ffb Mon Sep 17 00:00:00 2001 From: Sebastian Sumpf Date: Wed, 1 Dec 2021 08:34:36 +0100 Subject: [PATCH] base-hw: Remove 'riscv_qemu' and move to 'genode-riscv' issue #4312 --- repos/base-hw/board/riscv_qemu/arch | 1 - .../board/riscv_qemu/image_link_address | 1 - .../mk/spec/riscv/bootstrap-hw-riscv_qemu.mk | 10 ----- .../lib/mk/spec/riscv/core-hw-riscv_qemu.mk | 27 ------------ .../recipes/src/base-hw-riscv_qemu/content.mk | 1 - .../recipes/src/base-hw-riscv_qemu/hash | 1 - .../recipes/src/base-hw-riscv_qemu/used_apis | 2 - .../src/bootstrap/board/riscv_qemu/board.h | 25 ----------- .../base-hw/src/core/board/riscv_qemu/board.h | 27 ------------ .../base-hw/src/core/board/riscv_qemu/plic.h | 38 ----------------- repos/base-hw/src/core/spec/riscv/timer.h | 3 -- .../src/include/hw/spec/riscv/page_table.h | 2 +- .../src/include/hw/spec/riscv/qemu_board.h | 41 ------------------- repos/base/board/riscv_qemu/qemu_args | 2 - tool/builddir/build.conf/repos_riscv | 5 +++ tool/create_builddir | 2 +- 16 files changed, 7 insertions(+), 181 deletions(-) delete mode 100644 repos/base-hw/board/riscv_qemu/arch delete mode 100644 repos/base-hw/board/riscv_qemu/image_link_address delete mode 100644 repos/base-hw/lib/mk/spec/riscv/bootstrap-hw-riscv_qemu.mk delete mode 100644 repos/base-hw/lib/mk/spec/riscv/core-hw-riscv_qemu.mk delete mode 100644 repos/base-hw/recipes/src/base-hw-riscv_qemu/content.mk delete mode 100644 repos/base-hw/recipes/src/base-hw-riscv_qemu/hash delete mode 100644 repos/base-hw/recipes/src/base-hw-riscv_qemu/used_apis delete mode 100644 repos/base-hw/src/bootstrap/board/riscv_qemu/board.h delete mode 100644 repos/base-hw/src/core/board/riscv_qemu/board.h delete mode 100644 repos/base-hw/src/core/board/riscv_qemu/plic.h delete mode 100644 repos/base-hw/src/include/hw/spec/riscv/qemu_board.h delete mode 100644 repos/base/board/riscv_qemu/qemu_args create mode 100644 tool/builddir/build.conf/repos_riscv diff --git a/repos/base-hw/board/riscv_qemu/arch b/repos/base-hw/board/riscv_qemu/arch deleted file mode 100644 index d569162349..0000000000 --- a/repos/base-hw/board/riscv_qemu/arch +++ /dev/null @@ -1 +0,0 @@ -riscv diff --git a/repos/base-hw/board/riscv_qemu/image_link_address b/repos/base-hw/board/riscv_qemu/image_link_address deleted file mode 100644 index 7f05e0972b..0000000000 --- a/repos/base-hw/board/riscv_qemu/image_link_address +++ /dev/null @@ -1 +0,0 @@ -0x80200000 diff --git a/repos/base-hw/lib/mk/spec/riscv/bootstrap-hw-riscv_qemu.mk b/repos/base-hw/lib/mk/spec/riscv/bootstrap-hw-riscv_qemu.mk deleted file mode 100644 index 707edad709..0000000000 --- a/repos/base-hw/lib/mk/spec/riscv/bootstrap-hw-riscv_qemu.mk +++ /dev/null @@ -1,10 +0,0 @@ -INC_DIR += $(REP_DIR)/src/bootstrap/board/riscv_qemu - -SRC_CC += bootstrap/spec/riscv/platform.cc -SRC_S += bootstrap/spec/riscv/crt0.s -SRC_CC += lib/base/riscv/kernel/interface.cc -SRC_CC += spec/64bit/memory_map.cc - -vpath spec/64bit/memory_map.cc $(REP_DIR)/src/lib/hw - -include $(REP_DIR)/lib/mk/bootstrap-hw.inc diff --git a/repos/base-hw/lib/mk/spec/riscv/core-hw-riscv_qemu.mk b/repos/base-hw/lib/mk/spec/riscv/core-hw-riscv_qemu.mk deleted file mode 100644 index cd1659bb65..0000000000 --- a/repos/base-hw/lib/mk/spec/riscv/core-hw-riscv_qemu.mk +++ /dev/null @@ -1,27 +0,0 @@ -REP_INC_DIR += src/core/spec/riscv src/core/board/riscv_qemu - -CC_OPT += -fno-delete-null-pointer-checks - -# add C++ sources -SRC_CC += platform_services.cc -SRC_CC += kernel/vm_thread_off.cc -SRC_CC += kernel/cpu_up.cc -SRC_CC += kernel/lock.cc -SRC_CC += spec/riscv/kernel/thread.cc -SRC_CC += spec/riscv/kernel/cpu.cc -SRC_CC += spec/riscv/kernel/interface.cc -SRC_CC += spec/riscv/kernel/pd.cc -SRC_CC += spec/riscv/cpu.cc -SRC_CC += spec/riscv/pic.cc -SRC_CC += spec/riscv/platform_support.cc -SRC_CC += spec/riscv/timer.cc -SRC_CC += spec/64bit/memory_map.cc - -#add assembly sources -SRC_S += spec/riscv/exception_vector.s -SRC_S += spec/riscv/crt0.s - -vpath spec/64bit/memory_map.cc $(call select_from_repositories,src/lib/hw) - -# include less specific configuration -include $(call select_from_repositories,lib/mk/core-hw.inc) diff --git a/repos/base-hw/recipes/src/base-hw-riscv_qemu/content.mk b/repos/base-hw/recipes/src/base-hw-riscv_qemu/content.mk deleted file mode 100644 index 31319dcaf1..0000000000 --- a/repos/base-hw/recipes/src/base-hw-riscv_qemu/content.mk +++ /dev/null @@ -1 +0,0 @@ -include $(GENODE_DIR)/repos/base-hw/recipes/src/base-hw_content.inc diff --git a/repos/base-hw/recipes/src/base-hw-riscv_qemu/hash b/repos/base-hw/recipes/src/base-hw-riscv_qemu/hash deleted file mode 100644 index e15544fc91..0000000000 --- a/repos/base-hw/recipes/src/base-hw-riscv_qemu/hash +++ /dev/null @@ -1 +0,0 @@ -2021-11-29 065c3a960169cb275938c657083d377e8a86ad35 diff --git a/repos/base-hw/recipes/src/base-hw-riscv_qemu/used_apis b/repos/base-hw/recipes/src/base-hw-riscv_qemu/used_apis deleted file mode 100644 index ed9b772565..0000000000 --- a/repos/base-hw/recipes/src/base-hw-riscv_qemu/used_apis +++ /dev/null @@ -1,2 +0,0 @@ -base-hw -base diff --git a/repos/base-hw/src/bootstrap/board/riscv_qemu/board.h b/repos/base-hw/src/bootstrap/board/riscv_qemu/board.h deleted file mode 100644 index 442a5dcf3f..0000000000 --- a/repos/base-hw/src/bootstrap/board/riscv_qemu/board.h +++ /dev/null @@ -1,25 +0,0 @@ -/* - * \brief RISC-V Qemu specific board definitions - * \author Stefan Kalkowski - * \date 2017-02-20 - */ - -/* - * Copyright (C) 2017 Genode Labs GmbH - * - * This file is part of the Genode OS framework, which is distributed - * under the terms of the GNU Affero General Public License version 3. - */ - -#ifndef _SRC__BOOTSTRAP__SPEC__RISCV_QEMU__BOARD_H_ -#define _SRC__BOOTSTRAP__SPEC__RISCV_QEMU__BOARD_H_ - -#include - -namespace Board { using namespace Hw::Riscv_board; } - -template -void Sv39::Level_x_translation_table::_translation_added(addr_t, size_t) -{ } - -#endif /* _SRC__BOOTSTRAP__SPEC__RISCV_QEMU__BOARD_H_ */ diff --git a/repos/base-hw/src/core/board/riscv_qemu/board.h b/repos/base-hw/src/core/board/riscv_qemu/board.h deleted file mode 100644 index 2c33300172..0000000000 --- a/repos/base-hw/src/core/board/riscv_qemu/board.h +++ /dev/null @@ -1,27 +0,0 @@ -/* - * \brief Board spcecification - * \author Sebastian Sumpf - * \date 2015-06-02 - */ - -/* - * Copyright (C) 2015-2017 Genode Labs GmbH - * - * This file is part of the Genode OS framework, which is distributed - * under the terms of the GNU Affero General Public License version 3. - */ - -#ifndef _CORE__SPEC__RISCV_QEMU__BOARD_H_ -#define _CORE__SPEC__RISCV_QEMU__BOARD_H_ - -/* base-hw internal includes */ -#include - -/* base-hw Core includes */ -#include -#include -#include - -namespace Board { using namespace Hw::Riscv_board; } - -#endif /* _CORE__SPEC__RISCV_QEMU__BOARD_H_ */ diff --git a/repos/base-hw/src/core/board/riscv_qemu/plic.h b/repos/base-hw/src/core/board/riscv_qemu/plic.h deleted file mode 100644 index 9a4a300bf9..0000000000 --- a/repos/base-hw/src/core/board/riscv_qemu/plic.h +++ /dev/null @@ -1,38 +0,0 @@ -/** - * \brief Platform-level interrupt controller layout (PLIC) - * \author Sebastian Sumpf - * \date 2021-03-05 - */ - -/* - * Copyright (C) 2021 Genode Labs GmbH - * - * This file is part of the Genode OS framework, which is distributed - * under the terms of the GNU Affero General Public License version 3. - */ - -#ifndef _CORE__SPEC__RISCV_QEMU__PLIC_H_ -#define _CORE__SPEC__RISCV_QEMU__PLIC_H_ - -namespace Board { class Plic; } - -struct Board::Plic : Genode::Mmio -{ - enum { NR_OF_IRQ = 32 }; - - struct Enable : Register_array<0x80, 32, 32, 1> { }; - struct Id : Register<0x1ff004, 32> { }; - - Plic(Genode::addr_t const base) - : - Mmio(base) { } - - void enable(unsigned value, unsigned irq) - { - write(value, irq); - } - - void el(unsigned, unsigned) { } -}; - -#endif /* _CORE__SPEC__RISCV_QEMU__PLIC_H_ */ diff --git a/repos/base-hw/src/core/spec/riscv/timer.h b/repos/base-hw/src/core/spec/riscv/timer.h index 10942d2172..04138565cd 100644 --- a/repos/base-hw/src/core/spec/riscv/timer.h +++ b/repos/base-hw/src/core/spec/riscv/timer.h @@ -18,9 +18,6 @@ #include #include -/* base-hw internal includes */ -#include - namespace Board { class Timer; } diff --git a/repos/base-hw/src/include/hw/spec/riscv/page_table.h b/repos/base-hw/src/include/hw/spec/riscv/page_table.h index 93cbbcbb6e..7848d18e68 100644 --- a/repos/base-hw/src/include/hw/spec/riscv/page_table.h +++ b/repos/base-hw/src/include/hw/spec/riscv/page_table.h @@ -413,7 +413,7 @@ namespace Hw { { enum { TABLE_LEVEL_X_SIZE_LOG2 = Sv39::SIZE_LOG2_4K, - CORE_VM_AREA_SIZE = 128 * 1024 * 1024, + CORE_VM_AREA_SIZE = 512 * 1024 * 1024, CORE_TRANS_TABLE_COUNT = _count(CORE_VM_AREA_SIZE, Sv39::SIZE_LOG2_1G) + _count(CORE_VM_AREA_SIZE, Sv39::SIZE_LOG2_2M), diff --git a/repos/base-hw/src/include/hw/spec/riscv/qemu_board.h b/repos/base-hw/src/include/hw/spec/riscv/qemu_board.h deleted file mode 100644 index 8ebdb6b4ed..0000000000 --- a/repos/base-hw/src/include/hw/spec/riscv/qemu_board.h +++ /dev/null @@ -1,41 +0,0 @@ -/* - * \brief RISC-V Qemu specific board definitions - * \author Sebastian Sumpf - * \author Stefan Kalkowski - * \date 2021-02-09 - */ - -/* - * Copyright (C) 2021 Genode Labs GmbH - * - * This file is part of the Genode OS framework, which is distributed - * under the terms of the GNU Affero General Public License version 3. - */ - -#ifndef _SRC__INCLUDE__HW__SPEC__RISCV__QEMU_BOARD_H_ -#define _SRC__INCLUDE__HW__SPEC__RISCV__QEMU_BOARD_H_ - -#include -#include -#include - -namespace Hw::Riscv_board { - - enum { - RAM_BASE = 0x80020000, - RAM_SIZE = 0x7fe0000, - TIMER_HZ = 10000000, - - PLIC_BASE = 0xc002000, - PLIC_SIZE = 0x200000, - }; - - enum { UART_BASE, UART_CLOCK }; - - struct Serial : Hw::Riscv_uart - { - Serial(Genode::addr_t, Genode::size_t, unsigned) { } - }; -} - -#endif /* _SRC__INCLUDE__HW__SPEC__RISCV__QEMU_BOARD_H_ */ diff --git a/repos/base/board/riscv_qemu/qemu_args b/repos/base/board/riscv_qemu/qemu_args deleted file mode 100644 index 24228a8b18..0000000000 --- a/repos/base/board/riscv_qemu/qemu_args +++ /dev/null @@ -1,2 +0,0 @@ --m 128 -machine virt -cpu rv64,priv_spec=v1.10.0 --bios default diff --git a/tool/builddir/build.conf/repos_riscv b/tool/builddir/build.conf/repos_riscv new file mode 100644 index 0000000000..2141a9716d --- /dev/null +++ b/tool/builddir/build.conf/repos_riscv @@ -0,0 +1,5 @@ +# +# Board support for RISC-V Qemu / MiG-V +# +#REPOSITORIES += $(GENODE_DIR)/repos/riscv + diff --git a/tool/create_builddir b/tool/create_builddir index ba369c429c..371db6b9b0 100755 --- a/tool/create_builddir +++ b/tool/create_builddir @@ -91,7 +91,7 @@ BUILD_CONF_ARM_V7 := run_arm_v7 run_boot_dir repos repos_arm_v7 BUILD_CONF(arm_v6) := $(BUILD_CONF_ARM_V6) BUILD_CONF(arm_v7a) := $(BUILD_CONF_ARM_V7) BUILD_CONF(arm_v8a) := run_arm_v8 run_boot_dir repos repos_arm_v8 -BUILD_CONF(riscv) := run_riscv run_boot_dir repos +BUILD_CONF(riscv) := run_riscv run_boot_dir repos repos_riscv BUILD_CONF(x86_32) := run_x86_32 $(BUILD_CONF_X86) BUILD_CONF(x86_64) := run_x86_64 $(BUILD_CONF_X86) BUILD_CONF(linux) := run_kernel_linux repos