mirror of
https://github.com/mmueller41/genode.git
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Remove zynq_qemu platform and zynq nic driver
Moved to separate repo at https://github.com/jschlatow/genode-zynq Fixes genodelabs/genode#4280
This commit is contained in:
Johannes Schlatow
committed by
Christian Helmuth
Christian Helmuth
parent
6ecae6adb3
commit
7917c5d9ec
@@ -1 +0,0 @@
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arm_v7a
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@@ -1 +0,0 @@
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0x00100000
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@@ -1,14 +0,0 @@
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REP_INC_DIR += src/bootstrap/board/zynq_qemu
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SRC_S += bootstrap/spec/arm/crt0.s
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SRC_CC += bootstrap/board/zynq_qemu/platform.cc
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SRC_CC += bootstrap/spec/arm/cpu.cc
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SRC_CC += bootstrap/spec/arm/cortex_a9_mmu.cc
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SRC_CC += bootstrap/spec/arm/gicv2.cc
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SRC_CC += bootstrap/spec/arm/arm_v7_cpu.cc
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SRC_CC += hw/spec/32bit/memory_map.cc
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NR_OF_CPUS = 1
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include $(call select_from_repositories,lib/mk/bootstrap-hw.inc)
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@@ -1,11 +0,0 @@
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#
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# \brief Build config for Genodes core process
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# \author Johannes Schlatow
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# \date 2014-12-15
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#
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# add C++ sources
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SRC_CC += platform_services.cc
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# include less specific configuration
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include $(call select_from_repositories,lib/mk/spec/cortex_a9/core-hw.inc)
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@@ -1,13 +0,0 @@
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#
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# \brief Build config for Genodes core process
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# \author Johannes Schlatow
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# \date 2014-12-15
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#
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# add include paths
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REP_INC_DIR += src/core/board/zynq_qemu
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NR_OF_CPUS = 1
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# include less specific configuration
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include $(call select_from_repositories,lib/mk/spec/arm_v7/core-hw-zynq.inc)
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@@ -1 +0,0 @@
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include $(GENODE_DIR)/repos/base-hw/recipes/src/base-hw_content.inc
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@@ -1 +0,0 @@
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2021-10-13 3233ce8f7b5f3246ace4fbdf810b1632cb147a1a
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@@ -1,2 +0,0 @@
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base-hw
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base
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@@ -1,30 +0,0 @@
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/*
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* \brief Zynq specific board definitions
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* \author Stefan Kalkowski
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* \date 2017-02-20
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*/
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/*
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* Copyright (C) 2017 Genode Labs GmbH
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*
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* This file is part of the Genode OS framework, which is distributed
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* under the terms of the GNU Affero General Public License version 3.
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*/
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#ifndef _SRC__BOOTSTRAP__SPEC__ZYNQ__BOARD_H_
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#define _SRC__BOOTSTRAP__SPEC__ZYNQ__BOARD_H_
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#include <hw/spec/arm/zynq_qemu_board.h>
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#include <spec/arm/cortex_a9_actlr.h>
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#include <spec/arm/cortex_a9_page_table.h>
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#include <spec/arm/cpu.h>
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#include <hw/spec/arm/gicv2.h>
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namespace Board {
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using namespace Hw::Zynq_qemu_board;
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using Pic = Hw::Gicv2;
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static constexpr bool NON_SECURE = false;
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}
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#endif /* _SRC__BOOTSTRAP__SPEC__ZYNQ__BOARD_H_ */
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@@ -1,53 +0,0 @@
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/*
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* \brief Platform implementations specific for base-hw and Zynq
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* \author Johannes Schlatow
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* \author Stefan Kalkowski
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* \date 2014-12-15
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*/
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/*
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* Copyright (C) 2014-2017 Genode Labs GmbH
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*
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* This file is part of the Genode OS framework, which is distributed
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* under the terms of the GNU Affero General Public License version 3.
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*/
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/* core includes */
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#include <platform.h>
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using namespace Board;
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Bootstrap::Platform::Board::Board()
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:
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early_ram_regions(Memory_region { RAM_0_BASE + 0x1000,
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RAM_0_SIZE - 0x1000 }),
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late_ram_regions(Memory_region { RAM_0_BASE, 0x1000 }),
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core_mmio(Memory_region { CORTEX_A9_PRIVATE_MEM_BASE,
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CORTEX_A9_PRIVATE_MEM_SIZE },
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Memory_region { UART_BASE,
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UART_SIZE },
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Memory_region { PL310_MMIO_BASE,
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PL310_MMIO_SIZE })
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{ }
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bool Cpu::errata(Board::Cpu::Errata) { return false; }
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void Cpu::wake_up_all_cpus(void* ip)
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{
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struct Wakeup_generator : Genode::Mmio
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{
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struct Core1_boot_addr : Register<0x0, 32> { };
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Wakeup_generator(void * const ip) : Mmio(CORE1_ENTRY)
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{
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write<Core1_boot_addr>((Genode::addr_t)ip);
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}
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};
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Wakeup_generator wgen(ip);
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asm volatile("dsb\n"
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"sev\n");
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}
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@@ -1,37 +0,0 @@
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/*
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* \brief Board driver for core on Zynq
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* \author Johannes Schlatow
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* \author Stefan Kalkowski
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* \author Martin Stein
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* \date 2014-06-02
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*/
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/*
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* Copyright (C) 2014-2017 Genode Labs GmbH
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*
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* This file is part of the Genode OS framework, which is distributed
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* under the terms of the GNU Affero General Public License version 3.
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*/
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#ifndef _CORE__SPEC__ZYNQ_QEMU__BOARD_H_
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#define _CORE__SPEC__ZYNQ_QEMU__BOARD_H_
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/* base-hw internal includes */
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#include <hw/spec/arm/gicv2.h>
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#include <hw/spec/arm/zynq_qemu_board.h>
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/* base-hw Core includes */
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#include <spec/arm/cortex_a9_private_timer.h>
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#include <spec/cortex_a9/cpu.h>
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namespace Board {
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using namespace Hw::Zynq_qemu_board;
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class Global_interrupt_controller { };
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class Pic : public Hw::Gicv2 { public: Pic(Global_interrupt_controller &) { } };
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L2_cache & l2_cache();
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}
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#endif /* _CORE__SPEC__ZYNQ_QEMU__BOARD_H_ */
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@@ -1,35 +0,0 @@
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/*
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* \brief Zynq specific board definitions
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* \author Stefan Kalkowski
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* \date 2019-05-16
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*/
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/*
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* Copyright (C) 2019 Genode Labs GmbH
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*
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* This file is part of the Genode OS framework, which is distributed
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* under the terms of the GNU Affero General Public License version 3.
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*/
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#ifndef _SRC__INCLUDE__HW__SPEC__ARM__ZYNQ_BOARD_H_
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#define _SRC__INCLUDE__HW__SPEC__ARM__ZYNQ_BOARD_H_
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#include <drivers/defs/zynq_qemu.h>
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#include <drivers/uart/xilinx.h>
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#include <hw/spec/arm/cortex_a9.h>
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#include <hw/spec/arm/pl310.h>
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#include <hw/spec/arm/boot_info.h>
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namespace Hw::Zynq_qemu_board {
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using namespace Zynq_qemu;
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using L2_cache = Hw::Pl310;
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using Cpu_mmio = Hw::Cortex_a9_mmio<CORTEX_A9_PRIVATE_MEM_BASE>;
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using Serial = Genode::Xilinx_uart;
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enum {
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UART_BASE = UART_0_MMIO_BASE,
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};
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}
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#endif /* _SRC__INCLUDE__HW__SPEC__ARM__ZYNQ_BOARD_H_ */
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