diff --git a/repos/base-hw/lib/mk/spec/imx6q_sabrelite/bootstrap-hw.mk b/repos/base-hw/lib/mk/spec/imx6q_sabrelite/bootstrap-hw.mk index e78560ed83..6c613e6bd1 100644 --- a/repos/base-hw/lib/mk/spec/imx6q_sabrelite/bootstrap-hw.mk +++ b/repos/base-hw/lib/mk/spec/imx6q_sabrelite/bootstrap-hw.mk @@ -5,7 +5,7 @@ SRC_S += bootstrap/spec/arm/crt0.s SRC_CC += bootstrap/spec/arm/cpu.cc SRC_CC += bootstrap/spec/arm/cortex_a9_mmu.cc SRC_CC += bootstrap/spec/arm/pic.cc -SRC_CC += bootstrap/spec/imx6q_sabrelite/platform.cc +SRC_CC += bootstrap/spec/arm/imx6_platform.cc SRC_CC += hw/spec/arm/arm_v7_cpu.cc SRC_CC += hw/spec/32bit/memory_map.cc diff --git a/repos/base-hw/lib/mk/spec/wand_quad/bootstrap-hw.mk b/repos/base-hw/lib/mk/spec/wand_quad/bootstrap-hw.mk index 4e9cc4f3b7..559b0dc635 100644 --- a/repos/base-hw/lib/mk/spec/wand_quad/bootstrap-hw.mk +++ b/repos/base-hw/lib/mk/spec/wand_quad/bootstrap-hw.mk @@ -5,7 +5,7 @@ SRC_S += bootstrap/spec/arm/crt0.s SRC_CC += bootstrap/spec/arm/cpu.cc SRC_CC += bootstrap/spec/arm/cortex_a9_mmu.cc SRC_CC += bootstrap/spec/arm/pic.cc -SRC_CC += bootstrap/spec/wand_quad/platform.cc +SRC_CC += bootstrap/spec/arm/imx6_platform.cc SRC_CC += hw/spec/arm/arm_v7_cpu.cc SRC_CC += hw/spec/32bit/memory_map.cc diff --git a/repos/base-hw/src/bootstrap/spec/arm/imx6_platform.cc b/repos/base-hw/src/bootstrap/spec/arm/imx6_platform.cc new file mode 100644 index 0000000000..5a51c8ee17 --- /dev/null +++ b/repos/base-hw/src/bootstrap/spec/arm/imx6_platform.cc @@ -0,0 +1,78 @@ +/* + * \brief Specific bootstrap implementations + * \author Stefan Kalkowski + * \author Josef Soentgen + * \author Martin Stein + * \date 2014-02-25 + */ + +/* + * Copyright (C) 2014-2017 Genode Labs GmbH + * + * This file is part of the Genode OS framework, which is distributed + * under the terms of the GNU Affero General Public License version 3. + */ + +#include +#include + +using namespace Board; + +Bootstrap::Platform::Board::Board() +: early_ram_regions(Memory_region { RAM_BASE, RAM_SIZE }), + core_mmio(Memory_region { UART_BASE, + UART_SIZE }, + Memory_region { CORTEX_A9_PRIVATE_MEM_BASE, + CORTEX_A9_PRIVATE_MEM_SIZE }, + Memory_region { PL310_MMIO_BASE, + PL310_MMIO_SIZE }) +{ + Aipstz aipstz_1(AIPS_1_MMIO_BASE); + Aipstz aipstz_2(AIPS_2_MMIO_BASE); + + unsigned num_values = sizeof(initial_values) / (2*sizeof(unsigned long)); + for (unsigned i = 0; i < num_values; i++) + *((volatile unsigned long*)initial_values[i][0]) = initial_values[i][1]; +} + + +bool Bootstrap::Cpu::errata(Bootstrap::Cpu::Errata err) { + return (err == ARM_764369) ? true : false; } + + +void Bootstrap::Cpu::wake_up_all_cpus(void * const entry) +{ + struct Src : Genode::Mmio + { + struct Scr : Register<0x0, 32> + { + struct Core_1_reset : Bitfield<14,1> {}; + struct Core_2_reset : Bitfield<15,1> {}; + struct Core_3_reset : Bitfield<16,1> {}; + struct Core_1_enable : Bitfield<22,1> {}; + struct Core_2_enable : Bitfield<23,1> {}; + struct Core_3_enable : Bitfield<24,1> {}; + }; + struct Gpr1 : Register<0x20, 32> {}; /* ep core 0 */ + struct Gpr3 : Register<0x28, 32> {}; /* ep core 1 */ + struct Gpr5 : Register<0x30, 32> {}; /* ep core 2 */ + struct Gpr7 : Register<0x38, 32> {}; /* ep core 3 */ + + Src(void * const entry) : Genode::Mmio(SRC_MMIO_BASE) + { + write((Gpr3::access_t)entry); + write((Gpr5::access_t)entry); + write((Gpr7::access_t)entry); + Scr::access_t v = read(); + Scr::Core_1_enable::set(v,1); + Scr::Core_1_reset::set(v,1); + Scr::Core_2_enable::set(v,1); + Scr::Core_2_reset::set(v,1); + Scr::Core_3_enable::set(v,1); + Scr::Core_3_reset::set(v,1); + write(v); + } + }; + + Src src(entry); +} diff --git a/repos/base-hw/src/bootstrap/spec/imx6q_sabrelite/board.h b/repos/base-hw/src/bootstrap/spec/imx6q_sabrelite/board.h index 12a18d68ea..d1a7827e25 100644 --- a/repos/base-hw/src/bootstrap/spec/imx6q_sabrelite/board.h +++ b/repos/base-hw/src/bootstrap/spec/imx6q_sabrelite/board.h @@ -34,8 +34,151 @@ namespace Board { enum { UART_BASE = UART_2_MMIO_BASE, + UART_SIZE = UART_2_MMIO_SIZE, UART_CLOCK = 0, /* dummy value, not used */ }; + + static volatile unsigned long initial_values[][2] { + // (IOMUX Controller) + { 0x20e0004, 0x48613005 }, + { 0x20e0008, 0x0 }, + { 0x20e000c, 0x1e00040 }, + { 0x20e0020, 0xfffd4000 }, + { 0x20e0030, 0xf004490 }, + { 0x20e0034, 0x593e4a4 }, + { 0x20e004c, 0x3 }, + { 0x20e0050, 0x3 }, + { 0x20e0054, 0x3 }, + { 0x20e015c, 0x0 }, + { 0x20e0160, 0x0 }, + { 0x20e0164, 0x0 }, + { 0x20e0168, 0x0 }, + { 0x20e0170, 0x0 }, + { 0x20e0174, 0x0 }, + { 0x20e0178, 0x0 }, + { 0x20e017c, 0x0 }, + { 0x20e0180, 0x0 }, + { 0x20e0184, 0x0 }, + { 0x20e0188, 0x0 }, + { 0x20e018c, 0x0 }, + { 0x20e0190, 0x0 }, + { 0x20e0194, 0x0 }, + { 0x20e0198, 0x0 }, + { 0x20e019c, 0x0 }, + { 0x20e01a0, 0x0 }, + { 0x20e01a4, 0x0 }, + { 0x20e01a8, 0x0 }, + { 0x20e01ac, 0x0 }, + { 0x20e01b0, 0x0 }, + { 0x20e01b4, 0x0 }, + { 0x20e01b8, 0x0 }, + { 0x20e01bc, 0x0 }, + { 0x20e01c0, 0x0 }, + { 0x20e01c4, 0x0 }, + { 0x20e01c8, 0x0 }, + { 0x20e01cc, 0x0 }, + { 0x20e0208, 0x2 }, + { 0x20e020c, 0x2 }, + { 0x20e0218, 0x2 }, + { 0x20e0220, 0x0 }, + { 0x20e0224, 0x3 }, + { 0x20e0230, 0x11 }, + { 0x20e02b8, 0x0 }, + { 0x20e02f4, 0x0 }, + { 0x20e033c, 0x2 }, + { 0x20e0344, 0x3 }, + { 0x20e0348, 0x2 }, + { 0x20e035c, 0x3 }, + { 0x20e0360, 0x130b0 }, + { 0x20e0364, 0x110b0 }, + { 0x20e0368, 0x130b0 }, + { 0x20e036c, 0x10030 }, + { 0x20e0370, 0x10030 }, + { 0x20e0374, 0x10030 }, + { 0x20e0378, 0x10030 }, + { 0x20e037c, 0x10030 }, + { 0x20e0388, 0x10030 }, + { 0x20e03b0, 0xb1 }, + { 0x20e03bc, 0xb0 }, + { 0x20e03c0, 0xb0 }, + { 0x20e0470, 0x10 }, + { 0x20e0474, 0x10 }, + { 0x20e0478, 0x10 }, + { 0x20e047c, 0x10 }, + { 0x20e0484, 0x10 }, + { 0x20e0488, 0x10 }, + { 0x20e048c, 0x10 }, + { 0x20e0490, 0x10 }, + { 0x20e0494, 0x10 }, + { 0x20e0498, 0x10 }, + { 0x20e049c, 0x10 }, + { 0x20e04a0, 0x10 }, + { 0x20e04a4, 0x10 }, + { 0x20e04a8, 0x10 }, + { 0x20e04ac, 0x10 }, + { 0x20e04b0, 0x10 }, + { 0x20e04b4, 0x10 }, + { 0x20e04b8, 0x10 }, + { 0x20e04bc, 0x10 }, + { 0x20e04c0, 0x10 }, + { 0x20e04c4, 0x10 }, + { 0x20e04c8, 0x10 }, + { 0x20e04cc, 0x10 }, + { 0x20e04d0, 0x10 }, + { 0x20e04d4, 0x10 }, + { 0x20e04d8, 0x10 }, + { 0x20e04dc, 0x10 }, + { 0x20e04e0, 0x10 }, + { 0x20e04e4, 0x100b0 }, + { 0x20e04e8, 0x100b0 }, + { 0x20e0508, 0x100b0 }, + { 0x20e05f0, 0x30b0 }, + { 0x20e05f4, 0x17059 }, + { 0x20e0600, 0xb1 }, + { 0x20e061c, 0x30b0 }, + { 0x20e069c, 0x1f0b0 }, + { 0x20e06a4, 0x10059 }, + { 0x20e06e0, 0x10059 }, + { 0x20e0724, 0x1b0b1 }, + { 0x20e072c, 0x1b0b1 }, + { 0x20e0730, 0x1b0b1 }, + { 0x20e0744, 0x130b0 }, + { 0x20e07c4, 0x1 }, + { 0x20e0944, 0x1 }, + // (Global Power Controller) + { 0x20dc008, 0x70f7f01b }, + { 0x20dc00c, 0xff79b60f }, + { 0x20dc010, 0xfffe0003 }, + { 0x20dc014, 0xfef7f9ff }, + // (Power Management Unit) + { 0x20c8140, 0x4c0013 }, + { 0x20c8150, 0x4010088 }, + { 0x20c8160, 0x8000040b }, + { 0x20c8170, 0xff672f67 }, + // (Clock Controller Module) + { 0x20c4018, 0x10204 }, + { 0x20c402c, 0x7348c1 }, + { 0x20c4030, 0x33e71f92 }, + { 0x20c4034, 0x12088 }, + { 0x20c4038, 0x12090 }, + { 0x20c4054, 0x78 }, + { 0x20c4060, 0x10e0101 }, + { 0x20c4064, 0x2fe62 }, + { 0x20c4068, 0xc03f0f }, + { 0x20c406c, 0x30fc00 }, + { 0x20c4070, 0x3ff0033 }, + { 0x20c4074, 0x3f3300c3 }, + { 0x20c4078, 0xc303 }, + { 0x20c4080, 0xf03 }, + { 0x20c8010, 0x80003040 }, + { 0x20c8070, 0x1006 }, + { 0x20c80a0, 0x1028 }, + { 0x20c80b0, 0x0 }, + { 0x20c80c0, 0xf4240 }, + { 0x20c80e0, 0x80182001 }, + { 0x20c80f0, 0xd3d150cc }, + { 0x20c8100, 0x5018d0db } + }; } struct Board::L2_cache : Hw::Pl310 diff --git a/repos/base-hw/src/bootstrap/spec/imx6q_sabrelite/platform.cc b/repos/base-hw/src/bootstrap/spec/imx6q_sabrelite/platform.cc deleted file mode 100644 index d34dd0b6ac..0000000000 --- a/repos/base-hw/src/bootstrap/spec/imx6q_sabrelite/platform.cc +++ /dev/null @@ -1,218 +0,0 @@ -/* - * \brief Specific bootstrap implementations - * \author Stefan Kalkowski - * \date 2019-01-05 - */ - -/* - * Copyright (C) 2019 Genode Labs GmbH - * - * This file is part of the Genode OS framework, which is distributed - * under the terms of the GNU Affero General Public License version 3. - */ - -#include -#include - -using namespace Board; - -Bootstrap::Platform::Board::Board() -: early_ram_regions(Memory_region { RAM_BASE, RAM_SIZE }), - core_mmio(Memory_region { UART_2_MMIO_BASE, - UART_2_MMIO_SIZE }, - Memory_region { CORTEX_A9_PRIVATE_MEM_BASE, - CORTEX_A9_PRIVATE_MEM_SIZE }, - Memory_region { PL310_MMIO_BASE, - PL310_MMIO_SIZE }) -{ - Aipstz aipstz_1(AIPS_1_MMIO_BASE); - Aipstz aipstz_2(AIPS_2_MMIO_BASE); - - static volatile unsigned long initial_values[][2] { - // (IOMUX Controller) - { 0x20e0004, 0x48613005 }, - { 0x20e0008, 0x0 }, - { 0x20e000c, 0x1e00040 }, - { 0x20e0020, 0xfffd4000 }, - { 0x20e0030, 0xf004490 }, - { 0x20e0034, 0x593e4a4 }, - { 0x20e004c, 0x3 }, - { 0x20e0050, 0x3 }, - { 0x20e0054, 0x3 }, - { 0x20e015c, 0x0 }, - { 0x20e0160, 0x0 }, - { 0x20e0164, 0x0 }, - { 0x20e0168, 0x0 }, - { 0x20e0170, 0x0 }, - { 0x20e0174, 0x0 }, - { 0x20e0178, 0x0 }, - { 0x20e017c, 0x0 }, - { 0x20e0180, 0x0 }, - { 0x20e0184, 0x0 }, - { 0x20e0188, 0x0 }, - { 0x20e018c, 0x0 }, - { 0x20e0190, 0x0 }, - { 0x20e0194, 0x0 }, - { 0x20e0198, 0x0 }, - { 0x20e019c, 0x0 }, - { 0x20e01a0, 0x0 }, - { 0x20e01a4, 0x0 }, - { 0x20e01a8, 0x0 }, - { 0x20e01ac, 0x0 }, - { 0x20e01b0, 0x0 }, - { 0x20e01b4, 0x0 }, - { 0x20e01b8, 0x0 }, - { 0x20e01bc, 0x0 }, - { 0x20e01c0, 0x0 }, - { 0x20e01c4, 0x0 }, - { 0x20e01c8, 0x0 }, - { 0x20e01cc, 0x0 }, - { 0x20e0208, 0x2 }, - { 0x20e020c, 0x2 }, - { 0x20e0218, 0x2 }, - { 0x20e0220, 0x0 }, - { 0x20e0224, 0x3 }, - { 0x20e0230, 0x11 }, - { 0x20e02b8, 0x0 }, - { 0x20e02f4, 0x0 }, - { 0x20e033c, 0x2 }, - { 0x20e0344, 0x3 }, - { 0x20e0348, 0x2 }, - { 0x20e035c, 0x3 }, - { 0x20e0360, 0x130b0 }, - { 0x20e0364, 0x110b0 }, - { 0x20e0368, 0x130b0 }, - { 0x20e036c, 0x10030 }, - { 0x20e0370, 0x10030 }, - { 0x20e0374, 0x10030 }, - { 0x20e0378, 0x10030 }, - { 0x20e037c, 0x10030 }, - { 0x20e0388, 0x10030 }, - { 0x20e03b0, 0xb1 }, - { 0x20e03bc, 0xb0 }, - { 0x20e03c0, 0xb0 }, - { 0x20e0470, 0x10 }, - { 0x20e0474, 0x10 }, - { 0x20e0478, 0x10 }, - { 0x20e047c, 0x10 }, - { 0x20e0484, 0x10 }, - { 0x20e0488, 0x10 }, - { 0x20e048c, 0x10 }, - { 0x20e0490, 0x10 }, - { 0x20e0494, 0x10 }, - { 0x20e0498, 0x10 }, - { 0x20e049c, 0x10 }, - { 0x20e04a0, 0x10 }, - { 0x20e04a4, 0x10 }, - { 0x20e04a8, 0x10 }, - { 0x20e04ac, 0x10 }, - { 0x20e04b0, 0x10 }, - { 0x20e04b4, 0x10 }, - { 0x20e04b8, 0x10 }, - { 0x20e04bc, 0x10 }, - { 0x20e04c0, 0x10 }, - { 0x20e04c4, 0x10 }, - { 0x20e04c8, 0x10 }, - { 0x20e04cc, 0x10 }, - { 0x20e04d0, 0x10 }, - { 0x20e04d4, 0x10 }, - { 0x20e04d8, 0x10 }, - { 0x20e04dc, 0x10 }, - { 0x20e04e0, 0x10 }, - { 0x20e04e4, 0x100b0 }, - { 0x20e04e8, 0x100b0 }, - { 0x20e0508, 0x100b0 }, - { 0x20e05f0, 0x30b0 }, - { 0x20e05f4, 0x17059 }, - { 0x20e0600, 0xb1 }, - { 0x20e061c, 0x30b0 }, - { 0x20e069c, 0x1f0b0 }, - { 0x20e06a4, 0x10059 }, - { 0x20e06e0, 0x10059 }, - { 0x20e0724, 0x1b0b1 }, - { 0x20e072c, 0x1b0b1 }, - { 0x20e0730, 0x1b0b1 }, - { 0x20e0744, 0x130b0 }, - { 0x20e07c4, 0x1 }, - { 0x20e0944, 0x1 }, - // (Global Power Controller) - { 0x20dc008, 0x70f7f01b }, - { 0x20dc00c, 0xff79b60f }, - { 0x20dc010, 0xfffe0003 }, - { 0x20dc014, 0xfef7f9ff }, - // (Power Management Unit) - { 0x20c8140, 0x4c0013 }, - { 0x20c8150, 0x4010088 }, - { 0x20c8160, 0x8000040b }, - { 0x20c8170, 0xff672f67 }, - // (Clock Controller Module) - { 0x20c4018, 0x10204 }, - { 0x20c402c, 0x7348c1 }, - { 0x20c4030, 0x33e71f92 }, - { 0x20c4034, 0x12088 }, - { 0x20c4038, 0x12090 }, - { 0x20c4054, 0x78 }, - { 0x20c4060, 0x10e0101 }, - { 0x20c4064, 0x2fe62 }, - { 0x20c4068, 0xc03f0f }, - { 0x20c406c, 0x30fc00 }, - { 0x20c4070, 0x3ff0033 }, - { 0x20c4074, 0x3f3300c3 }, - { 0x20c4078, 0xc303 }, - { 0x20c4080, 0xf03 }, - { 0x20c8010, 0x80003040 }, - { 0x20c8070, 0x1006 }, - { 0x20c80a0, 0x1028 }, - { 0x20c80b0, 0x0 }, - { 0x20c80c0, 0xf4240 }, - { 0x20c80e0, 0x80182001 }, - { 0x20c80f0, 0xd3d150cc }, - { 0x20c8100, 0x5018d0db } - }; - - unsigned num_values = sizeof(initial_values) / (2*sizeof(unsigned long)); - for (unsigned i = 0; i < num_values; i++) - *((volatile unsigned long*)initial_values[i][0]) = initial_values[i][1]; -} - - -bool Bootstrap::Cpu::errata(Bootstrap::Cpu::Errata err) { - return (err == ARM_764369) ? true : false; } - - -void Bootstrap::Cpu::wake_up_all_cpus(void * const entry) -{ - struct Src : Genode::Mmio - { - struct Scr : Register<0x0, 32> - { - struct Core_1_reset : Bitfield<14,1> {}; - struct Core_2_reset : Bitfield<15,1> {}; - struct Core_3_reset : Bitfield<16,1> {}; - struct Core_1_enable : Bitfield<22,1> {}; - struct Core_2_enable : Bitfield<23,1> {}; - struct Core_3_enable : Bitfield<24,1> {}; - }; - struct Gpr1 : Register<0x20, 32> {}; /* ep core 0 */ - struct Gpr3 : Register<0x28, 32> {}; /* ep core 1 */ - struct Gpr5 : Register<0x30, 32> {}; /* ep core 2 */ - struct Gpr7 : Register<0x38, 32> {}; /* ep core 3 */ - - Src(void * const entry) : Genode::Mmio(SRC_MMIO_BASE) - { - write((Gpr3::access_t)entry); - write((Gpr5::access_t)entry); - write((Gpr7::access_t)entry); - Scr::access_t v = read(); - Scr::Core_1_enable::set(v,1); - Scr::Core_1_reset::set(v,1); - Scr::Core_2_enable::set(v,1); - Scr::Core_2_reset::set(v,1); - Scr::Core_3_enable::set(v,1); - Scr::Core_3_reset::set(v,1); - write(v); - } - }; - - Src src(entry); -} diff --git a/repos/base-hw/src/bootstrap/spec/wand_quad/board.h b/repos/base-hw/src/bootstrap/spec/wand_quad/board.h index bc84fda6fe..9522ef8836 100644 --- a/repos/base-hw/src/bootstrap/spec/wand_quad/board.h +++ b/repos/base-hw/src/bootstrap/spec/wand_quad/board.h @@ -34,8 +34,185 @@ namespace Board { enum { UART_BASE = UART_1_MMIO_BASE, + UART_SIZE = UART_1_MMIO_SIZE, UART_CLOCK = 0, /* dummy value, not used */ }; + + static volatile unsigned long initial_values[][2] { + // (IOMUX Controller) + { 0x20e0000, 0x1 }, + { 0x20e0004, 0x48643005 }, + { 0x20e0008, 0x221 }, + { 0x20e000c, 0x1e00040 }, + { 0x20e0034, 0x593e4a4 }, + { 0x20e004c, 0x0 }, + { 0x20e0050, 0x0 }, + { 0x20e0054, 0x0 }, + { 0x20e0090, 0x1 }, + { 0x20e0094, 0x1 }, + { 0x20e0098, 0x1 }, + { 0x20e00a4, 0x16 }, + { 0x20e00a8, 0x4 }, + { 0x20e00ac, 0x2 }, + { 0x20e00b0, 0x2 }, + { 0x20e00b4, 0x2 }, + { 0x20e00b8, 0x2 }, + { 0x20e00c4, 0x11 }, + { 0x20e015c, 0x0 }, + { 0x20e0160, 0x0 }, + { 0x20e0164, 0x0 }, + { 0x20e0168, 0x0 }, + { 0x20e016c, 0x0 }, + { 0x20e0170, 0x0 }, + { 0x20e0174, 0x0 }, + { 0x20e0178, 0x0 }, + { 0x20e017c, 0x0 }, + { 0x20e0180, 0x0 }, + { 0x20e0184, 0x0 }, + { 0x20e0188, 0x0 }, + { 0x20e018c, 0x0 }, + { 0x20e0190, 0x0 }, + { 0x20e0194, 0x0 }, + { 0x20e0198, 0x0 }, + { 0x20e019c, 0x0 }, + { 0x20e01a0, 0x0 }, + { 0x20e01a4, 0x0 }, + { 0x20e01a8, 0x0 }, + { 0x20e01ac, 0x0 }, + { 0x20e01b0, 0x0 }, + { 0x20e01b4, 0x0 }, + { 0x20e01b8, 0x0 }, + { 0x20e01bc, 0x0 }, + { 0x20e01c0, 0x0 }, + { 0x20e01c4, 0x0 }, + { 0x20e01c8, 0x0 }, + { 0x20e01cc, 0x0 }, + { 0x20e01d4, 0x1 }, + { 0x20e01e4, 0x3 }, + { 0x20e0220, 0x0 }, + { 0x20e0224, 0x3 }, + { 0x20e022c, 0x4 }, + { 0x20e023c, 0x16 }, + { 0x20e0248, 0x12 }, + { 0x20e0250, 0x5 }, + { 0x20e0264, 0x5 }, + { 0x20e0268, 0x4 }, + { 0x20e026c, 0x4 }, + { 0x20e0270, 0x4 }, + { 0x20e0274, 0x4 }, + { 0x20e02b8, 0x0 }, + { 0x20e0320, 0x2 }, + { 0x20e0348, 0x0 }, + { 0x20e0354, 0x0 }, + { 0x20e0358, 0x0 }, + { 0x20e035c, 0x0 }, + { 0x20e0360, 0x17059 }, + { 0x20e0364, 0x17059 }, + { 0x20e0368, 0x17059 }, + { 0x20e03a0, 0xf0b0 }, + { 0x20e03a4, 0x100b1 }, + { 0x20e03a8, 0x100b1 }, + { 0x20e03ac, 0x100b1 }, + { 0x20e03b8, 0x1b8b1 }, + { 0x20e03c0, 0x1b0b1 }, + { 0x20e03c4, 0x1b0b1 }, + { 0x20e03c8, 0x1b0b1 }, + { 0x20e03cc, 0x1b0b1 }, + { 0x20e03d8, 0x1b8b1 }, + { 0x20e0470, 0x10 }, + { 0x20e0474, 0x10 }, + { 0x20e0478, 0x10 }, + { 0x20e047c, 0x10 }, + { 0x20e0484, 0x10 }, + { 0x20e0488, 0x10 }, + { 0x20e048c, 0x10 }, + { 0x20e0490, 0x10 }, + { 0x20e0494, 0x10 }, + { 0x20e0498, 0x10 }, + { 0x20e049c, 0x10 }, + { 0x20e04a0, 0x10 }, + { 0x20e04a4, 0x10 }, + { 0x20e04a8, 0x10 }, + { 0x20e04ac, 0x10 }, + { 0x20e04b0, 0x10 }, + { 0x20e04b4, 0x10 }, + { 0x20e04b8, 0x10 }, + { 0x20e04bc, 0x10 }, + { 0x20e04c0, 0x10 }, + { 0x20e04c4, 0x10 }, + { 0x20e04c8, 0x10 }, + { 0x20e04cc, 0x10 }, + { 0x20e04d0, 0x10 }, + { 0x20e04d4, 0x10 }, + { 0x20e04d8, 0x10 }, + { 0x20e04dc, 0x10 }, + { 0x20e04e0, 0x10 }, + { 0x20e05e8, 0xb0 }, + { 0x20e05f0, 0xb0 }, + { 0x20e05f4, 0x17059 }, + { 0x20e05fc, 0xb0 }, + { 0x20e0600, 0xb0b0 }, + { 0x20e060c, 0x1b8b1 }, + { 0x20e0618, 0x1b0a8 }, + { 0x20e0638, 0x130b0 }, + { 0x20e063c, 0x110b0 }, + { 0x20e0640, 0x130b0 }, + { 0x20e0644, 0x130b0 }, + { 0x20e064c, 0x1b0b0 }, + { 0x20e06a4, 0x10059 }, + { 0x20e0704, 0x0 }, + { 0x20e0708, 0x1b0b1 }, + { 0x20e0738, 0x10059 }, + { 0x20e073c, 0x10059 }, + { 0x20e0740, 0x17059 }, + { 0x20e0744, 0x17059 }, + { 0x20e083c, 0x1 }, + { 0x20e0870, 0x0 }, + { 0x20e0874, 0x0 }, + { 0x20e08a8, 0x2 }, + { 0x20e08ac, 0x2 }, + { 0x20e092c, 0x1 }, + { 0x20e0930, 0x1 }, + + // (Global Power Controller) + { 0x20dc008, 0x6a23e613 }, + { 0x20dc00c, 0xff69b64f }, + { 0x20dc010, 0xfffe0003 }, + { 0x20dc014, 0xff30f7ff }, + + // (Power Management Unit) + { 0x20c8120, 0x11775 }, + { 0x20c8140, 0x580016 }, + { 0x20c8160, 0x8000000b }, + { 0x20c8170, 0xc0672f67 }, + + // (Clock Controller Module) + { 0x20c4018, 0x10204 }, + { 0x20c402c, 0x7312c1 }, + { 0x20c4030, 0x32271f92 }, + { 0x20c4034, 0x12680 }, + { 0x20c4038, 0x12090 }, + { 0x20c4054, 0x78 }, + { 0x20c4058, 0x41a0000 }, + { 0x20c4060, 0x10e0101 }, + { 0x20c4064, 0x2fe62 }, + { 0x20c4068, 0xc03f0f }, + { 0x20c406c, 0x30fc00 }, + { 0x20c4070, 0x3ff0033 }, + { 0x20c4074, 0x3ff3303f }, + { 0x20c4078, 0x30c300 }, + { 0x20c407c, 0xf0000f3 }, + { 0x20c4080, 0xc00 }, + { 0x20c8000, 0x80002053 }, + { 0x20c8020, 0x3040 }, + { 0x20c8070, 0x1006 }, + { 0x20c80a0, 0x80002031 }, + { 0x20c80b0, 0x7a120 }, + { 0x20c80c0, 0xf4240 }, + { 0x20c80e0, 0x80002003 }, + { 0x20c80f0, 0x9391508c }, + { 0x20c8100, 0x5058d01b } + }; } struct Board::L2_cache : Hw::Pl310 diff --git a/repos/base-hw/src/bootstrap/spec/wand_quad/platform.cc b/repos/base-hw/src/bootstrap/spec/wand_quad/platform.cc deleted file mode 100644 index 1b339e1ac3..0000000000 --- a/repos/base-hw/src/bootstrap/spec/wand_quad/platform.cc +++ /dev/null @@ -1,254 +0,0 @@ -/* - * \brief Specific bootstrap implementations - * \author Stefan Kalkowski - * \author Josef Soentgen - * \author Martin Stein - * \date 2014-02-25 - */ - -/* - * Copyright (C) 2014-2017 Genode Labs GmbH - * - * This file is part of the Genode OS framework, which is distributed - * under the terms of the GNU Affero General Public License version 3. - */ - -#include -#include - -using namespace Board; - -Bootstrap::Platform::Board::Board() -: early_ram_regions(Memory_region { RAM0_BASE, RAM0_SIZE }), - core_mmio(Memory_region { UART_1_MMIO_BASE, - UART_1_MMIO_SIZE }, - Memory_region { CORTEX_A9_PRIVATE_MEM_BASE, - CORTEX_A9_PRIVATE_MEM_SIZE }, - Memory_region { PL310_MMIO_BASE, - PL310_MMIO_SIZE }) -{ - Aipstz aipstz_1(AIPS_1_MMIO_BASE); - Aipstz aipstz_2(AIPS_2_MMIO_BASE); - - static volatile unsigned long initial_values[][2] { - // (IOMUX Controller) - { 0x20e0000, 0x1 }, - { 0x20e0004, 0x48643005 }, - { 0x20e0008, 0x221 }, - { 0x20e000c, 0x1e00040 }, - { 0x20e0034, 0x593e4a4 }, - { 0x20e004c, 0x0 }, - { 0x20e0050, 0x0 }, - { 0x20e0054, 0x0 }, - { 0x20e0090, 0x1 }, - { 0x20e0094, 0x1 }, - { 0x20e0098, 0x1 }, - { 0x20e00a4, 0x16 }, - { 0x20e00a8, 0x4 }, - { 0x20e00ac, 0x2 }, - { 0x20e00b0, 0x2 }, - { 0x20e00b4, 0x2 }, - { 0x20e00b8, 0x2 }, - { 0x20e00c4, 0x11 }, - { 0x20e015c, 0x0 }, - { 0x20e0160, 0x0 }, - { 0x20e0164, 0x0 }, - { 0x20e0168, 0x0 }, - { 0x20e016c, 0x0 }, - { 0x20e0170, 0x0 }, - { 0x20e0174, 0x0 }, - { 0x20e0178, 0x0 }, - { 0x20e017c, 0x0 }, - { 0x20e0180, 0x0 }, - { 0x20e0184, 0x0 }, - { 0x20e0188, 0x0 }, - { 0x20e018c, 0x0 }, - { 0x20e0190, 0x0 }, - { 0x20e0194, 0x0 }, - { 0x20e0198, 0x0 }, - { 0x20e019c, 0x0 }, - { 0x20e01a0, 0x0 }, - { 0x20e01a4, 0x0 }, - { 0x20e01a8, 0x0 }, - { 0x20e01ac, 0x0 }, - { 0x20e01b0, 0x0 }, - { 0x20e01b4, 0x0 }, - { 0x20e01b8, 0x0 }, - { 0x20e01bc, 0x0 }, - { 0x20e01c0, 0x0 }, - { 0x20e01c4, 0x0 }, - { 0x20e01c8, 0x0 }, - { 0x20e01cc, 0x0 }, - { 0x20e01d4, 0x1 }, - { 0x20e01e4, 0x3 }, - { 0x20e0220, 0x0 }, - { 0x20e0224, 0x3 }, - { 0x20e022c, 0x4 }, - { 0x20e023c, 0x16 }, - { 0x20e0248, 0x12 }, - { 0x20e0250, 0x5 }, - { 0x20e0264, 0x5 }, - { 0x20e0268, 0x4 }, - { 0x20e026c, 0x4 }, - { 0x20e0270, 0x4 }, - { 0x20e0274, 0x4 }, - { 0x20e02b8, 0x0 }, - { 0x20e0320, 0x2 }, - { 0x20e0348, 0x0 }, - { 0x20e0354, 0x0 }, - { 0x20e0358, 0x0 }, - { 0x20e035c, 0x0 }, - { 0x20e0360, 0x17059 }, - { 0x20e0364, 0x17059 }, - { 0x20e0368, 0x17059 }, - { 0x20e03a0, 0xf0b0 }, - { 0x20e03a4, 0x100b1 }, - { 0x20e03a8, 0x100b1 }, - { 0x20e03ac, 0x100b1 }, - { 0x20e03b8, 0x1b8b1 }, - { 0x20e03c0, 0x1b0b1 }, - { 0x20e03c4, 0x1b0b1 }, - { 0x20e03c8, 0x1b0b1 }, - { 0x20e03cc, 0x1b0b1 }, - { 0x20e03d8, 0x1b8b1 }, - { 0x20e0470, 0x10 }, - { 0x20e0474, 0x10 }, - { 0x20e0478, 0x10 }, - { 0x20e047c, 0x10 }, - { 0x20e0484, 0x10 }, - { 0x20e0488, 0x10 }, - { 0x20e048c, 0x10 }, - { 0x20e0490, 0x10 }, - { 0x20e0494, 0x10 }, - { 0x20e0498, 0x10 }, - { 0x20e049c, 0x10 }, - { 0x20e04a0, 0x10 }, - { 0x20e04a4, 0x10 }, - { 0x20e04a8, 0x10 }, - { 0x20e04ac, 0x10 }, - { 0x20e04b0, 0x10 }, - { 0x20e04b4, 0x10 }, - { 0x20e04b8, 0x10 }, - { 0x20e04bc, 0x10 }, - { 0x20e04c0, 0x10 }, - { 0x20e04c4, 0x10 }, - { 0x20e04c8, 0x10 }, - { 0x20e04cc, 0x10 }, - { 0x20e04d0, 0x10 }, - { 0x20e04d4, 0x10 }, - { 0x20e04d8, 0x10 }, - { 0x20e04dc, 0x10 }, - { 0x20e04e0, 0x10 }, - { 0x20e05e8, 0xb0 }, - { 0x20e05f0, 0xb0 }, - { 0x20e05f4, 0x17059 }, - { 0x20e05fc, 0xb0 }, - { 0x20e0600, 0xb0b0 }, - { 0x20e060c, 0x1b8b1 }, - { 0x20e0618, 0x1b0a8 }, - { 0x20e0638, 0x130b0 }, - { 0x20e063c, 0x110b0 }, - { 0x20e0640, 0x130b0 }, - { 0x20e0644, 0x130b0 }, - { 0x20e064c, 0x1b0b0 }, - { 0x20e06a4, 0x10059 }, - { 0x20e0704, 0x0 }, - { 0x20e0708, 0x1b0b1 }, - { 0x20e0738, 0x10059 }, - { 0x20e073c, 0x10059 }, - { 0x20e0740, 0x17059 }, - { 0x20e0744, 0x17059 }, - { 0x20e083c, 0x1 }, - { 0x20e0870, 0x0 }, - { 0x20e0874, 0x0 }, - { 0x20e08a8, 0x2 }, - { 0x20e08ac, 0x2 }, - { 0x20e092c, 0x1 }, - { 0x20e0930, 0x1 }, - - // (Global Power Controller) - { 0x20dc008, 0x6a23e613 }, - { 0x20dc00c, 0xff69b64f }, - { 0x20dc010, 0xfffe0003 }, - { 0x20dc014, 0xff30f7ff }, - - // (Power Management Unit) - { 0x20c8120, 0x11775 }, - { 0x20c8140, 0x580016 }, - { 0x20c8160, 0x8000000b }, - { 0x20c8170, 0xc0672f67 }, - - // (Clock Controller Module) - { 0x20c4018, 0x10204 }, - { 0x20c402c, 0x7312c1 }, - { 0x20c4030, 0x32271f92 }, - { 0x20c4034, 0x12680 }, - { 0x20c4038, 0x12090 }, - { 0x20c4054, 0x78 }, - { 0x20c4058, 0x41a0000 }, - { 0x20c4060, 0x10e0101 }, - { 0x20c4064, 0x2fe62 }, - { 0x20c4068, 0xc03f0f }, - { 0x20c406c, 0x30fc00 }, - { 0x20c4070, 0x3ff0033 }, - { 0x20c4074, 0x3ff3303f }, - { 0x20c4078, 0x30c300 }, - { 0x20c407c, 0xf0000f3 }, - { 0x20c4080, 0xc00 }, - { 0x20c8000, 0x80002053 }, - { 0x20c8020, 0x3040 }, - { 0x20c8070, 0x1006 }, - { 0x20c80a0, 0x80002031 }, - { 0x20c80b0, 0x7a120 }, - { 0x20c80c0, 0xf4240 }, - { 0x20c80e0, 0x80002003 }, - { 0x20c80f0, 0x9391508c }, - { 0x20c8100, 0x5058d01b } - }; - - unsigned num_values = sizeof(initial_values) / (2*sizeof(unsigned long)); - for (unsigned i = 0; i < num_values; i++) - *((volatile unsigned long*)initial_values[i][0]) = initial_values[i][1]; -} - - -bool Bootstrap::Cpu::errata(Bootstrap::Cpu::Errata err) { - return (err == ARM_764369) ? true : false; } - - -void Bootstrap::Cpu::wake_up_all_cpus(void * const entry) -{ - struct Src : Genode::Mmio - { - struct Scr : Register<0x0, 32> - { - struct Core_1_reset : Bitfield<14,1> {}; - struct Core_2_reset : Bitfield<15,1> {}; - struct Core_3_reset : Bitfield<16,1> {}; - struct Core_1_enable : Bitfield<22,1> {}; - struct Core_2_enable : Bitfield<23,1> {}; - struct Core_3_enable : Bitfield<24,1> {}; - }; - struct Gpr1 : Register<0x20, 32> {}; /* ep core 0 */ - struct Gpr3 : Register<0x28, 32> {}; /* ep core 1 */ - struct Gpr5 : Register<0x30, 32> {}; /* ep core 2 */ - struct Gpr7 : Register<0x38, 32> {}; /* ep core 3 */ - - Src(void * const entry) : Genode::Mmio(SRC_MMIO_BASE) - { - write((Gpr3::access_t)entry); - write((Gpr5::access_t)entry); - write((Gpr7::access_t)entry); - Scr::access_t v = read(); - Scr::Core_1_enable::set(v,1); - Scr::Core_1_reset::set(v,1); - Scr::Core_2_enable::set(v,1); - Scr::Core_2_reset::set(v,1); - Scr::Core_3_enable::set(v,1); - Scr::Core_3_reset::set(v,1); - write(v); - } - }; - - Src src(entry); -} diff --git a/repos/base/include/drivers/defs/wand_quad.h b/repos/base/include/drivers/defs/wand_quad.h index 46914c896c..76d091f027 100644 --- a/repos/base/include/drivers/defs/wand_quad.h +++ b/repos/base/include/drivers/defs/wand_quad.h @@ -26,8 +26,8 @@ namespace Wand_quad { enum { /* normal RAM */ - RAM0_BASE = 0x10000000, - RAM0_SIZE = 0x80000000, + RAM_BASE = 0x10000000, + RAM_SIZE = 0x80000000, }; };