hw: remove code duplication related to Exynos5 SoC

Fixes #1396
This commit is contained in:
Stefan Kalkowski
2015-02-04 14:20:52 +01:00
committed by Christian Helmuth
parent 4caf12cd16
commit a3abf74d1e
10 changed files with 20 additions and 110 deletions

View File

@@ -34,15 +34,6 @@ namespace Genode
PMU_MMIO_BASE = 0x10040000,
PMU_MMIO_SIZE = 0x5000,
/* interrupt controller */
GIC_CPU_MMIO_BASE = 0x10480000,
GIC_CPU_MMIO_SIZE = 0x00010000,
/* UART */
UART_2_MMIO_BASE = 0x12C20000,
UART_2_CLOCK = 100000000,
UART_2_IRQ = 85,
/* USB */
USB_HOST20_IRQ = 103,
USB_DRD30_IRQ = 104,
@@ -56,14 +47,11 @@ namespace Genode
/* SD card */
SDMMC0_IRQ = 107,
/* UART */
UART_2_CLOCK = 100000000,
/* wether board provides security extension */
SECURITY_EXTENSION = 1,
/* IRAM */
IRAM_BASE = 0x02020000,
/* hardware name of the primary processor */
PRIMARY_MPIDR_AFF_0 = 0,
};
};
}

View File

@@ -26,17 +26,8 @@ namespace Genode
{
enum
{
/* interrupt controller */
GIC_CPU_MMIO_BASE = 0x10481000,
GIC_CPU_MMIO_SIZE = 0x00010000,
/* UART */
UART_2_MMIO_BASE = 0x12C20000,
UART_2_CLOCK = 62668800,
UART_2_IRQ = 85,
/* CPU cache */
CACHE_LINE_SIZE_LOG2 = 6,
UART_2_CLOCK = 62668800,
/* wether board provides security extension */
SECURITY_EXTENSION = 0,

View File

@@ -35,6 +35,14 @@ class Genode::Exynos5
MMIO_0_BASE = 0x10000000,
MMIO_0_SIZE = 0x10000000,
/* interrupt controller */
GIC_CPU_MMIO_BASE = 0x10480000,
GIC_CPU_MMIO_SIZE = 0x00010000,
/* UART */
UART_2_MMIO_BASE = 0x12C20000,
UART_2_IRQ = 85,
/* pulse-width-modulation timer */
PWM_MMIO_BASE = 0x12dd0000,
PWM_MMIO_SIZE = 0x1000,
@@ -50,6 +58,12 @@ class Genode::Exynos5
/* CPU cache */
CACHE_LINE_SIZE_LOG2 = 6,
/* IRAM */
IRAM_BASE = 0x02020000,
/* hardware name of the primary processor */
PRIMARY_MPIDR_AFF_0 = 0,
};
};