mirror of
https://github.com/mmueller41/genode.git
synced 2026-01-21 12:32:56 +01:00
committed by
Christian Helmuth
parent
4caf12cd16
commit
a3abf74d1e
@@ -34,15 +34,6 @@ namespace Genode
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PMU_MMIO_BASE = 0x10040000,
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PMU_MMIO_SIZE = 0x5000,
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/* interrupt controller */
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GIC_CPU_MMIO_BASE = 0x10480000,
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GIC_CPU_MMIO_SIZE = 0x00010000,
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/* UART */
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UART_2_MMIO_BASE = 0x12C20000,
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UART_2_CLOCK = 100000000,
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UART_2_IRQ = 85,
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/* USB */
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USB_HOST20_IRQ = 103,
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USB_DRD30_IRQ = 104,
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@@ -56,14 +47,11 @@ namespace Genode
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/* SD card */
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SDMMC0_IRQ = 107,
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/* UART */
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UART_2_CLOCK = 100000000,
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/* wether board provides security extension */
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SECURITY_EXTENSION = 1,
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/* IRAM */
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IRAM_BASE = 0x02020000,
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/* hardware name of the primary processor */
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PRIMARY_MPIDR_AFF_0 = 0,
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};
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};
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}
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@@ -26,17 +26,8 @@ namespace Genode
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{
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enum
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{
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/* interrupt controller */
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GIC_CPU_MMIO_BASE = 0x10481000,
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GIC_CPU_MMIO_SIZE = 0x00010000,
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/* UART */
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UART_2_MMIO_BASE = 0x12C20000,
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UART_2_CLOCK = 62668800,
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UART_2_IRQ = 85,
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/* CPU cache */
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CACHE_LINE_SIZE_LOG2 = 6,
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UART_2_CLOCK = 62668800,
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/* wether board provides security extension */
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SECURITY_EXTENSION = 0,
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@@ -35,6 +35,14 @@ class Genode::Exynos5
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MMIO_0_BASE = 0x10000000,
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MMIO_0_SIZE = 0x10000000,
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/* interrupt controller */
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GIC_CPU_MMIO_BASE = 0x10480000,
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GIC_CPU_MMIO_SIZE = 0x00010000,
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/* UART */
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UART_2_MMIO_BASE = 0x12C20000,
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UART_2_IRQ = 85,
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/* pulse-width-modulation timer */
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PWM_MMIO_BASE = 0x12dd0000,
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PWM_MMIO_SIZE = 0x1000,
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@@ -50,6 +58,12 @@ class Genode::Exynos5
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/* CPU cache */
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CACHE_LINE_SIZE_LOG2 = 6,
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/* IRAM */
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IRAM_BASE = 0x02020000,
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/* hardware name of the primary processor */
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PRIMARY_MPIDR_AFF_0 = 0,
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};
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};
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