hw: refactor irq controllers

* name irq controller memory mapped I/O regions consistently
  in board descriptions
* move irq controller and timer memory mapped I/O region descriptions
  from cpu class to board class
* eliminate artificial distinction between flavors of ARM's GIC
* factor cpu local initialization out of ARM's GIC interface description,
  which is needed if the GIC is initialized differently e.g. for TrustZone

Ref #1405
This commit is contained in:
Stefan Kalkowski
2015-02-09 11:36:38 +01:00
committed by Christian Helmuth
parent c13fbff8c1
commit a40932a324
27 changed files with 182 additions and 186 deletions

View File

@@ -71,8 +71,8 @@ namespace Genode
GPIO7_IRQL = 107,
GPIO7_IRQH = 108,
TZIC_MMIO_BASE = 0x0fffc000,
TZIC_MMIO_SIZE = 0x00004000,
IRQ_CONTROLLER_BASE = 0x0fffc000,
IRQ_CONTROLLER_SIZE = 0x00004000,
AIPS_1_MMIO_BASE = 0x53f00000,
AIPS_2_MMIO_BASE = 0x63f00000,

View File

@@ -36,8 +36,8 @@ class Genode::Exynos5
MMIO_0_SIZE = 0x10000000,
/* interrupt controller */
GIC_CPU_MMIO_BASE = 0x10480000,
GIC_CPU_MMIO_SIZE = 0x00010000,
IRQ_CONTROLLER_BASE = 0x10480000,
IRQ_CONTROLLER_SIZE = 0x00010000,
/* UART */
UART_2_MMIO_BASE = 0x12C20000,