From b596db3eedcae5fd0dfe5d6a2d8fd6e663aa6bde Mon Sep 17 00:00:00 2001 From: Stefan Kalkowski Date: Mon, 21 Nov 2022 15:35:11 +0100 Subject: [PATCH] pistachio: size-aligned I/O mem mapping in core This commit circumvents faulty behaviour of base-pistachio, if the PCI config space gets requested megabyte-wise. It occurs that we get a mapping sequence in between sigma0, core and component, like the following: 0xe1000000 => 0xbf001000 => 0x10b000, with the consequence that the component stalls when accessing the latter one. By requesting I/O memory aligned to the size, the faulty behaviour vanishes. Ref #4686 --- repos/base-pistachio/src/core/io_mem_session_support.cc | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/repos/base-pistachio/src/core/io_mem_session_support.cc b/repos/base-pistachio/src/core/io_mem_session_support.cc index b1365d467e..71a6c01e1f 100644 --- a/repos/base-pistachio/src/core/io_mem_session_support.cc +++ b/repos/base-pistachio/src/core/io_mem_session_support.cc @@ -66,10 +66,10 @@ addr_t Io_mem_session_component::_map_local(addr_t base, size_t size) if (is_conventional_memory(base)) return base; - /* align large I/O dataspaces on a super-page boundary within core */ + /* align large I/O dataspaces to super page size, otherwise to size */ size_t const align = (size >= get_super_page_size()) - ? get_super_page_size_log2() - : get_page_size_log2(); + ? get_super_page_size_log2() + : log2(size); return platform().region_alloc().alloc_aligned(size, align).convert( [&] (void *ptr) { return (addr_t)ptr; },