base-nova: Added hypercalls to access hardware performance monitoring counters.

This commit is contained in:
Michael Mueller
2023-03-27 17:00:18 +02:00
parent 0f1002fab8
commit e5c8167992
2 changed files with 47 additions and 12 deletions

View File

@@ -3,7 +3,8 @@
* \author Norman Feske * \author Norman Feske
* \author Sebastian Sumpf * \author Sebastian Sumpf
* \author Alexander Boettcher * \author Alexander Boettcher
* \date 2009-12-27 * \author Michael Müller
* \date 2022-12-13
*/ */
/* /*
@@ -133,11 +134,19 @@ namespace Nova {
bool has_feature_svm() const { return feature_flags & (1 << 2); } bool has_feature_svm() const { return feature_flags & (1 << 2); }
struct Cpu_desc { struct Cpu_desc {
enum Vendor
{
UNKNOWN,
INTEL,
AMD
};
uint8_t flags; uint8_t flags;
uint8_t thread; uint8_t thread;
uint8_t core; uint8_t core;
uint8_t package; uint8_t package;
uint8_t acpi_id; uint8_t acpi_id;
uint8_t vendor;
uint8_t family; uint8_t family;
uint8_t model; uint8_t model;
uint8_t stepping:4; uint8_t stepping:4;
@@ -246,8 +255,6 @@ namespace Nova {
EC_RESCHEDULE = 3U, EC_RESCHEDULE = 3U,
EC_MIGRATE = 4U, EC_MIGRATE = 4U,
EC_TIME = 5U, EC_TIME = 5U,
EC_RDMSR = 6U,
EC_WRMSR = 7U,
}; };
enum Sc_op { enum Sc_op {
@@ -257,6 +264,19 @@ namespace Nova {
SC_EC_TIME = 3, SC_EC_TIME = 3,
}; };
/**
* Hpc operations
*
*/
enum Hpc_op
{
HPC_SETUP = 6U,
HPC_START = 7U,
HPC_STOP = 8U,
HPC_RESET = 9U,
HPC_READ = 10U,
};
/** /**
* Pd operations * Pd operations
*/ */
@@ -545,7 +565,7 @@ namespace Nova {
public: public:
enum { DEFAULT_QUANTUM = 10000, DEFAULT_PRIORITY = 64 }; enum { DEFAULT_QUANTUM = 1500, DEFAULT_PRIORITY = 64 };
Qpd(mword_t quantum = DEFAULT_QUANTUM, Qpd(mword_t quantum = DEFAULT_QUANTUM,
mword_t priority = DEFAULT_PRIORITY) mword_t priority = DEFAULT_PRIORITY)

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@@ -254,19 +254,34 @@ namespace Nova {
} }
ALWAYS_INLINE ALWAYS_INLINE
inline uint8_t ec_rdmsr(mword_t const ec, mword_t reg, mword_t &reg_val) inline uint8_t hpc_ctrl(Hpc_op op, mword_t sel, mword_t type, mword_t &p1, mword_t &p2, mword_t &p3)
{ {
uint8_t res = syscall_5(NOVA_EC_CTRL, EC_RDMSR, ec, reg_val, reg); uint8_t res = syscall_6(NOVA_EC_CTRL, op, sel, type, p1, p2, p3);
return res; return res;
} }
ALWAYS_INLINE ALWAYS_INLINE
inline uint8_t ec_wrmsr(mword_t const ec, mword_t reg, mword_t &reg_val) inline uint8_t hpc_read(mword_t sel, mword_t type, mword_t &value)
{ {
uint8_t res = syscall_5(NOVA_EC_CTRL, EC_WRMSR, ec, reg_val, reg); return syscall_5(NOVA_EC_CTRL, HPC_READ, sel, type, value);
}
return res; ALWAYS_INLINE
inline uint8_t hpc_start(mword_t sel, mword_t type)
{
return syscall_1(NOVA_EC_CTRL, HPC_START, sel, type);
}
ALWAYS_INLINE
inline uint8_t hpc_stop(mword_t sel, mword_t type)
{
return syscall_1(NOVA_EC_CTRL, HPC_STOP, sel, type);
}
ALWAYS_INLINE
inline uint8_t hpc_reset(mword_t sel, mword_t type, mword_t val)
{
return syscall_2(NOVA_EC_CTRL, HPC_RESET, sel, type, val);
} }
ALWAYS_INLINE ALWAYS_INLINE