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Stefan Kalkowski 7b5237f9ff hw: add CSU I/O memory to core's memory regions 
The central security regions has to be mapped when starting the hw-kernel
on the i.MX53 and using the TrustZone mechanisms.

Ref #1182
2014-06-26 10:57:27 +02:00
..
32bit/base
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64bit/base
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arm
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base
base: introduce caching attributes (fix #1184)
2014-06-26 10:57:26 +02:00
cap_session
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cpu
base: interface for D- and I-cache synchronization
2014-05-27 11:14:45 +02:00
cpu_session
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dataspace
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drivers
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io_mem_session
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io_port_session
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irq_session
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log_session
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pager
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parent
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pd_session
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platform
hw: add CSU I/O memory to core's memory regions
2014-06-26 10:57:27 +02:00
ram_session
base: introduce caching attributes (fix #1184)
2014-06-26 10:57:26 +02:00
rm_session
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rom_session
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root
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session
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signal_session
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thread
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trace_session
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util
util: abort construction of zero-sized bit arrays
2014-06-26 10:57:25 +02:00
x86/cpu
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x86_32/cpu
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x86_64/cpu
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README
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README 

This directory contains include files of interfaces that are exported
by components to be used by other components. Each subdirectory corresponds
to the component exporting the interface.