Sebastian Sumpf 6223ae4413 riscv: Interrupt controller support ...

- Enable the "platform-level interrupt controller" PLIC on base-hw
- The RISC-V specification offers only a register description, but no
  layout for the register set. This implies the layout is platform
  dependent, and therefore, implemented separately for Qemu

issue #4042

2021-03-12 12:01:38 +01:00

..

spec

riscv: Interrupt controller support

2021-03-12 12:01:38 +01:00

base-hw-common.mk

riscv: Use Qemu and update to ISA v1.10

2021-02-23 12:02:44 +01:00

base-hw.mk

riscv: Use Qemu and update to ISA v1.10

2021-02-23 12:02:44 +01:00

bootstrap-hw.inc

base-hw: avoid double slashes in path names

2021-02-23 12:02:45 +01:00

core-hw.inc

base-hw: avoid double slashes in path names

2021-02-23 12:02:45 +01:00

timeout-hw.mk

base: remove alarm library from base

2020-10-09 13:33:36 +02:00