version: 18.11

Release notes for version 18.11
depot: update recipe hashes
2026-01-22 04:52:56 +01:00 · 2018-11-29 14:15:25 +01:00 · 2018-11-29 14:12:41 +01:00 · 2018-11-29 11:54:31 +01:00 · 2018-11-29 11:54:31 +01:00 · 2018-11-29 11:54:31 +01:00
1478 changed files with 28140 additions and 14260 deletions
--- a/2
+++ b/2
@@ -1 +1 @@
-18.08
+18.11
--- a/doc/news.txt
+++ b/doc/news.txt
@@ -4,6 +4,29 @@
                               ===========


+Dual licensing of 3rd-party Genode components | 2018-11-16
+##########################################################
+
+| To nurture a sustainable ecosystem around the Genode OS framework, we
+| introduce a new approach for conducting dual-licensing businesses enabled
+| by Genode.
+
+Since founded ten years ago, Genode Labs pursues the Genode project based on a
+dual-licensing business model, which allows us to fund the development of
+Genode as an independent team. The licensing business is enabled by the
+combination of the AGPLv3 as a strong copyleft license with the library-like
+nature of Genode. Until today, this model is applicable to our framework but
+impractical for 3rd-party component developers. To foster a sustainable
+ecosystem around Genode, we wish to enable others to pursue a similar business
+model while maintaining the spirit of open collaboration and free software.
+
+We eventually crafted a new license called "Genode Component Public License"
+(Genode CPL) specifically for components developed by 3rd parties, outside of
+Genode Labs. The article
+[https://genode.org/documentation/articles/component_public_license - Dual licensing of 3rd-party Genode components]
+provides the rationale, license text, and FAQ of this software license.
+
+
 Sculpt with Visual Composition | 2018-09-21
 ###########################################

--- a/doc/release_notes-18-11.txt
+++ b/doc/release_notes-18-11.txt
--- a/repos/base-fiasco/lib/mk/core-fiasco.inc
+++ b/repos/base-fiasco/lib/mk/core-fiasco.inc
@@ -38,7 +38,8 @@ SRC_CC      += stack_area.cc \
               signal_transmitter_proxy.cc \
               signal_receiver.cc \
               thread_start.cc \
-               trace_session_component.cc
+               trace_session_component.cc \
+               heartbeat.cc

 INC_DIR     += $(REP_DIR)/src/core/include \
               $(GEN_CORE_DIR)/include \
@@ -77,3 +78,4 @@ vpath dump_alloc.cc               $(GEN_CORE_DIR)
 vpath stack_area.cc               $(GEN_CORE_DIR)
 vpath pager_ep.cc                 $(GEN_CORE_DIR)
 vpath platform_rom_modules.cc     $(GEN_CORE_DIR)
+vpath heartbeat.cc                $(GEN_CORE_DIR)
--- a/repos/base-fiasco/recipes/src/base-fiasco/hash
+++ b/repos/base-fiasco/recipes/src/base-fiasco/hash
@@ -1 +1 @@
-2018-09-11 d340e19f9801c16c7884f2473f2eeecde84dc7ca
+2018-11-27 611bb7bfeeb9f1cf18b479024a6f9a0040cbd52f
--- a/repos/base-foc/lib/mk/core-foc.inc
+++ b/repos/base-foc/lib/mk/core-foc.inc
@@ -38,7 +38,8 @@ SRC_CC      += stack_area.cc \
               signal_transmitter_proxy.cc \
               signal_receiver.cc \
               thread_start.cc \
-               trace_session_component.cc
+               trace_session_component.cc \
+               heartbeat.cc

 INC_DIR     += $(REP_DIR)/src/core/include \
               $(GEN_CORE_DIR)/include \
@@ -70,5 +71,6 @@ vpath signal_receiver.cc          $(GEN_CORE_DIR)
 vpath core_rpc_cap_alloc.cc       $(GEN_CORE_DIR)
 vpath core_region_map.cc          $(GEN_CORE_DIR)
 vpath platform_rom_modules.cc     $(GEN_CORE_DIR)
+vpath heartbeat.cc                $(GEN_CORE_DIR)
 vpath %.cc                        $(REP_DIR)/src/core
 vpath %.cc                        $(REP_DIR)/src/lib/base
--- a/repos/base-foc/recipes/src/base-foc-arndale/README
+++ b/repos/base-foc/recipes/src/base-foc-arndale/README
--- a/repos/base-foc/recipes/src/base-foc-arndale/base-foc-pbxa9/README
+++ b/repos/base-foc/recipes/src/base-foc-arndale/base-foc-pbxa9/README
@@ -0,0 +1,7 @@
+This archive contains the Fiasco.OC-specific part of Genode.
+
+It also contains the source code of the Fiasco.OC kernel in the
+'src/kernel/foc' directory.
+
+Please note that Fiasco.OC has a license distinct from Genode. Fiasco.OC's
+license can be found at 'src/kernel/foc/COPYING-GPL-2'.
--- a/repos/base-foc/recipes/src/base-foc-arndale/base-foc-pbxa9/content.mk
+++ b/repos/base-foc/recipes/src/base-foc-arndale/base-foc-pbxa9/content.mk
@@ -0,0 +1,7 @@
+RECIPE_DIR := $(REP_DIR)/recipes/src/base-foc-pbxa9
+
+include $(GENODE_DIR)/repos/base-foc/recipes/src/base-foc_content.inc
+
+content: enable_board_spec
+enable_board_spec: etc/specs.conf
+	echo "SPECS += pbxa9" >> etc/specs.conf
--- a/repos/base-foc/recipes/src/base-foc-arndale/base-foc-pbxa9/hash
+++ b/repos/base-foc/recipes/src/base-foc-arndale/base-foc-pbxa9/hash
@@ -0,0 +1 @@
+2018-11-14 778d83a4be78dcd6d1e4d45f1ca103def7b298a5
--- a/repos/base-foc/recipes/src/base-foc-arndale/base-foc-pbxa9/used_apis
+++ b/repos/base-foc/recipes/src/base-foc-arndale/base-foc-pbxa9/used_apis
--- a/repos/base-foc/recipes/src/base-foc-arndale/content.mk
+++ b/repos/base-foc/recipes/src/base-foc-arndale/content.mk
@@ -0,0 +1,7 @@
+RECIPE_DIR := $(REP_DIR)/recipes/src/base-foc-arndale
+
+include $(GENODE_DIR)/repos/base-foc/recipes/src/base-foc_content.inc
+
+content: enable_board_spec
+enable_board_spec: etc/specs.conf
+	echo "SPECS += arndale" >> etc/specs.conf
--- a/repos/base-foc/recipes/src/base-foc-arndale/hash
+++ b/repos/base-foc/recipes/src/base-foc-arndale/hash
@@ -0,0 +1 @@
+2018-11-27 cf3fa9aa12c4a234c40e274f9f34adf970b8615e
--- a/repos/base-foc/recipes/src/base-foc-arndale/used_apis
+++ b/repos/base-foc/recipes/src/base-foc-arndale/used_apis
@@ -0,0 +1 @@
+base
--- a/repos/base-foc/recipes/src/base-foc-pbxa9/README
+++ b/repos/base-foc/recipes/src/base-foc-pbxa9/README
@@ -0,0 +1,7 @@
+This archive contains the Fiasco.OC-specific part of Genode.
+
+It also contains the source code of the Fiasco.OC kernel in the
+'src/kernel/foc' directory.
+
+Please note that Fiasco.OC has a license distinct from Genode. Fiasco.OC's
+license can be found at 'src/kernel/foc/COPYING-GPL-2'.
--- a/repos/base-foc/recipes/src/base-foc-pbxa9/content.mk
+++ b/repos/base-foc/recipes/src/base-foc-pbxa9/content.mk
@@ -0,0 +1,7 @@
+RECIPE_DIR := $(REP_DIR)/recipes/src/base-foc-pbxa9
+
+include $(GENODE_DIR)/repos/base-foc/recipes/src/base-foc_content.inc
+
+content: enable_board_spec
+enable_board_spec: etc/specs.conf
+	echo "SPECS += pbxa9" >> etc/specs.conf
--- a/repos/base-foc/recipes/src/base-foc-pbxa9/hash
+++ b/repos/base-foc/recipes/src/base-foc-pbxa9/hash
@@ -0,0 +1 @@
+2018-11-27 fe18a97034e44fda5a886cb6294ffb9fdfda7069
--- a/repos/base-foc/recipes/src/base-foc-pbxa9/used_apis
+++ b/repos/base-foc/recipes/src/base-foc-pbxa9/used_apis
@@ -0,0 +1 @@
+base
--- a/repos/base-foc/recipes/src/base-foc-pc/README
+++ b/repos/base-foc/recipes/src/base-foc-pc/README
@@ -0,0 +1,7 @@
+This archive contains the Fiasco.OC-specific part of Genode.
+
+It also contains the source code of the Fiasco.OC kernel in the
+'src/kernel/foc' directory.
+
+Please note that Fiasco.OC has a license distinct from Genode. Fiasco.OC's
+license can be found at 'src/kernel/foc/COPYING-GPL-2'.
--- a/repos/base-foc/recipes/src/base-foc-pc/content.mk
+++ b/repos/base-foc/recipes/src/base-foc-pc/content.mk
@@ -0,0 +1,3 @@
+RECIPE_DIR := $(REP_DIR)/recipes/src/base-foc-pc
+
+include $(GENODE_DIR)/repos/base-foc/recipes/src/base-foc_content.inc
--- a/repos/base-foc/recipes/src/base-foc-pc/hash
+++ b/repos/base-foc/recipes/src/base-foc-pc/hash
@@ -0,0 +1 @@
+2018-11-27 44cec6d014bd5d259ef484f1926dadf0b86542a9
--- a/repos/base-foc/recipes/src/base-foc-pc/used_apis
+++ b/repos/base-foc/recipes/src/base-foc-pc/used_apis
@@ -0,0 +1 @@
+base
--- a/repos/base-foc/recipes/src/base-foc/hash
+++ b/repos/base-foc/recipes/src/base-foc/hash
@@ -1 +0,0 @@
-2018-09-11 4e8800fd9dc2adf6abeed5d3eca0a487a1a01cdb
--- a/repos/base-foc/recipes/src/base-foc_content.inc
+++ b/repos/base-foc/recipes/src/base-foc_content.inc
@@ -24,7 +24,7 @@ include/spec/%/trace/timestamp.h:

 content: README
 README:
-	cp $(REP_DIR)/recipes/src/base-foc/README $@
+	cp $(RECIPE_DIR)/README $@

 content: lib/import config etc
 lib/import config etc:
--- a/repos/base-hw/include/spec/arndale/vm_state.h
+++ b/repos/base-hw/include/spec/arndale/vm_state.h
@@ -51,6 +51,11 @@ struct Genode::Vm_state : Genode::Cpu_state_modes
 	Genode::uint32_t tls3;
 	Genode::uint32_t cpacr;

+	/**
+	 * Fpu registers
+	 */
+	Genode::uint32_t fpscr;
+	Genode::uint64_t d0_d31[32];

 	/**
 	 * Timer related registers
--- a/repos/base-hw/include/spec/imx53/vm_state.h
+++ b/repos/base-hw/include/spec/imx53/vm_state.h
@@ -31,6 +31,13 @@ struct Genode::Vm_state : Genode::Cpu_state_modes
 	Genode::addr_t dfar;
 	Genode::addr_t ttbr[2];
 	Genode::addr_t ttbrc;
+
+	/**
+	 * Fpu registers
+	 */
+	Genode::uint32_t fpscr;
+	Genode::uint64_t d0_d31[32];
+
 	Genode::addr_t irq_injection;
 };

--- a/repos/base-hw/lib/mk/core-hw.inc
+++ b/repos/base-hw/lib/mk/core-hw.inc
@@ -64,6 +64,7 @@ SRC_CC += kernel/object.cc
 SRC_CC += init_main_thread.cc
 SRC_CC += capability.cc
 SRC_CC += stack_area_addr.cc
+SRC_CC += heartbeat.cc

 # provide Genode version information
 include $(BASE_DIR)/src/core/version.inc
--- a/repos/base-hw/lib/mk/spec/arm_v6/core-hw.inc
+++ b/repos/base-hw/lib/mk/spec/arm_v6/core-hw.inc
@@ -16,5 +16,7 @@ SRC_CC += spec/arm/kernel/thread_update_pd.cc
 SRC_CC += kernel/vm_thread_off.cc
 SRC_CC += kernel/kernel.cc

+SRC_S  += spec/arm/vfpv2.s
+
 # include less specific configuration
 include $(BASE_DIR)/../base-hw/lib/mk/spec/arm/core-hw.inc
--- a/repos/base-hw/lib/mk/spec/arm_v7/core-hw.inc
+++ b/repos/base-hw/lib/mk/spec/arm_v7/core-hw.inc
@@ -11,5 +11,7 @@ INC_DIR += $(BASE_DIR)/../base-hw/src/core/spec/arm_v7
 SRC_CC += spec/arm_v7/cpu.cc
 SRC_CC += spec/arm_v7/perf_counter.cc

+SRC_S  += spec/arm/vfpv3-d32.cc
+
 # include less specific configuration
 include $(BASE_DIR)/../base-hw/lib/mk/spec/arm/core-hw.inc
--- a/repos/base-hw/lib/mk/spec/arndale/bootstrap-hw.mk
+++ b/repos/base-hw/lib/mk/spec/arndale/bootstrap-hw.mk
@@ -13,6 +13,6 @@ NR_OF_CPUS = 2
 # we need more specific compiler hints for some 'special' assembly code
 # override -march=armv7-a because it conflicts with -mcpu=cortex-a15
 #
-CC_MARCH = -mcpu=cortex-a15
+CC_MARCH = -mcpu=cortex-a15 -mfpu=vfpv3 -mfloat-abi=softfp

 include $(REP_DIR)/lib/mk/bootstrap-hw.inc
--- a/repos/base-hw/lib/mk/spec/arndale/core-hw.mk
+++ b/repos/base-hw/lib/mk/spec/arndale/core-hw.mk
@@ -25,7 +25,7 @@ NR_OF_CPUS = 2
 # we need more specific compiler hints for some 'special' assembly code
 # override -march=armv7-a because it conflicts with -mcpu=cortex-a15
 #
-CC_MARCH = -mcpu=cortex-a15
+CC_MARCH = -mcpu=cortex-a15 -mfpu=vfpv3 -mfloat-abi=softfp

 # include less specific configuration
 include $(REP_DIR)/lib/mk/spec/exynos5/core-hw.inc
--- a/repos/base-hw/lib/mk/spec/cortex_a9/core-hw.inc
+++ b/repos/base-hw/lib/mk/spec/cortex_a9/core-hw.inc
@@ -10,7 +10,6 @@ INC_DIR += $(BASE_DIR)/../base-hw/src/core/spec/arm_gic

 # add C++ sources
 SRC_CC += spec/cortex_a9/kernel/cpu.cc
-SRC_CC += spec/cortex_a9/fpu.cc
 SRC_CC += spec/cortex_a9/board.cc
 SRC_CC += spec/cortex_a9/timer.cc
 SRC_CC += spec/arm/smp/kernel/thread_update_pd.cc
--- a/repos/base-hw/lib/mk/spec/panda/bootstrap-hw.mk
+++ b/repos/base-hw/lib/mk/spec/panda/bootstrap-hw.mk
@@ -9,6 +9,6 @@ SRC_CC    += hw/spec/arm/arm_v7_cpu.cc
 SRC_CC    += hw/spec/32bit/memory_map.cc
 SRC_S     += bootstrap/spec/arm/crt0.s

-CC_MARCH = -mcpu=cortex-a9
+CC_MARCH = -mcpu=cortex-a9 -mfpu=vfpv3 -mfloat-abi=softfp

 include $(BASE_DIR)/../base-hw/lib/mk/bootstrap-hw.inc
--- a/repos/base-hw/lib/mk/spec/panda/core-hw.mk
+++ b/repos/base-hw/lib/mk/spec/panda/core-hw.mk
@@ -13,7 +13,7 @@ SRC_CC += platform_services.cc

 NR_OF_CPUS += 2

-CC_MARCH = -mcpu=cortex-a9
+CC_MARCH = -mcpu=cortex-a9 -mfpu=vfpv3 -mfloat-abi=softfp

 # include less specific configuration
 include $(REP_DIR)/lib/mk/spec/cortex_a9/core-hw.inc
--- a/repos/base-hw/recipes/api/base-hw/hash
+++ b/repos/base-hw/recipes/api/base-hw/hash
@@ -1 +1 @@
-2018-04-17 a1f75dc9604b2b807717473e7e73f738880a59bb
+2018-11-27 907d508d17bc57d4348038f78d058723cdee5728
--- a/repos/base-hw/recipes/src/base-hw-arndale/content.mk
+++ b/repos/base-hw/recipes/src/base-hw-arndale/content.mk
@@ -0,0 +1,5 @@
+include $(GENODE_DIR)/repos/base-hw/recipes/src/base-hw_content.inc
+
+content: enable_board_spec
+enable_board_spec: etc/specs.conf
+	echo "SPECS += arndale" >> etc/specs.conf
--- a/repos/base-hw/recipes/src/base-hw-arndale/hash
+++ b/repos/base-hw/recipes/src/base-hw-arndale/hash
@@ -0,0 +1 @@
+2018-11-27 dc9f02e760588af3fb4ca13a253f622713adc4b9
--- a/repos/base-hw/recipes/src/base-hw-arndale/used_apis
+++ b/repos/base-hw/recipes/src/base-hw-arndale/used_apis
@@ -0,0 +1,2 @@
+base-hw
+base
--- a/repos/base-hw/recipes/src/base-hw-imx53_qsb/content.mk
+++ b/repos/base-hw/recipes/src/base-hw-imx53_qsb/content.mk
@@ -0,0 +1,5 @@
+include $(GENODE_DIR)/repos/base-hw/recipes/src/base-hw_content.inc
+
+content: enable_board_spec
+enable_board_spec: etc/specs.conf
+	echo "SPECS += imx53_qsb" >> etc/specs.conf
--- a/repos/base-hw/recipes/src/base-hw-imx53_qsb/hash
+++ b/repos/base-hw/recipes/src/base-hw-imx53_qsb/hash
@@ -0,0 +1 @@
+2018-11-27 e9d1992511cbde7b6da8dd1a92d8d58f464387bf
--- a/repos/base-hw/recipes/src/base-hw-imx53_qsb/used_apis
+++ b/repos/base-hw/recipes/src/base-hw-imx53_qsb/used_apis
@@ -0,0 +1,2 @@
+base-hw
+base
--- a/repos/base-hw/recipes/src/base-hw-imx53_qsb_tz/content.mk
+++ b/repos/base-hw/recipes/src/base-hw-imx53_qsb_tz/content.mk
@@ -0,0 +1,5 @@
+include $(GENODE_DIR)/repos/base-hw/recipes/src/base-hw_content.inc
+
+content: enable_board_spec
+enable_board_spec: etc/specs.conf
+	echo "SPECS += imx53_qsb trustzone" >> etc/specs.conf
--- a/repos/base-hw/recipes/src/base-hw-imx53_qsb_tz/hash
+++ b/repos/base-hw/recipes/src/base-hw-imx53_qsb_tz/hash
@@ -0,0 +1 @@
+2018-11-27 b2b1f2c5f590822e2bf29ba0be2c83f134c0de65
--- a/repos/base-hw/recipes/src/base-hw-imx53_qsb_tz/used_apis
+++ b/repos/base-hw/recipes/src/base-hw-imx53_qsb_tz/used_apis
@@ -0,0 +1,2 @@
+base-hw
+base
--- a/repos/base-hw/recipes/src/base-hw-odroid_xu/content.mk
+++ b/repos/base-hw/recipes/src/base-hw-odroid_xu/content.mk
@@ -0,0 +1,5 @@
+include $(GENODE_DIR)/repos/base-hw/recipes/src/base-hw_content.inc
+
+content: enable_board_spec
+enable_board_spec: etc/specs.conf
+	echo "SPECS += odroid_xu" >> etc/specs.conf
--- a/repos/base-hw/recipes/src/base-hw-odroid_xu/hash
+++ b/repos/base-hw/recipes/src/base-hw-odroid_xu/hash
@@ -0,0 +1 @@
+2018-11-27 4c9b4f2486299c30514fa796d4b6bbc69f5b0c1b
--- a/repos/base-hw/recipes/src/base-hw-odroid_xu/used_apis
+++ b/repos/base-hw/recipes/src/base-hw-odroid_xu/used_apis
@@ -0,0 +1,2 @@
+base-hw
+base
--- a/repos/base-hw/recipes/src/base-hw-panda/content.mk
+++ b/repos/base-hw/recipes/src/base-hw-panda/content.mk
@@ -0,0 +1,5 @@
+include $(GENODE_DIR)/repos/base-hw/recipes/src/base-hw_content.inc
+
+content: enable_board_spec
+enable_board_spec: etc/specs.conf
+	echo "SPECS += panda" >> etc/specs.conf
--- a/repos/base-hw/recipes/src/base-hw-panda/hash
+++ b/repos/base-hw/recipes/src/base-hw-panda/hash
@@ -0,0 +1 @@
+2018-11-27 b8e997ad469a1cead6f6d3bd462e965015496656
--- a/repos/base-hw/recipes/src/base-hw-panda/used_apis
+++ b/repos/base-hw/recipes/src/base-hw-panda/used_apis
@@ -0,0 +1,2 @@
+base-hw
+base
--- a/repos/base-hw/recipes/src/base-hw-pbxa9/hash
+++ b/repos/base-hw/recipes/src/base-hw-pbxa9/hash
@@ -1 +1 @@
-2018-09-11 67a702597bf17e6d7465eedf6b97510545b40ca1
+2018-11-27 c51981468d6bce0ed4baa96b15309679ac4e5748
--- a/repos/base-hw/recipes/src/base-hw-pc/hash
+++ b/repos/base-hw/recipes/src/base-hw-pc/hash
@@ -1 +1 @@
-2018-09-11 64134c4fc1c1587578959ea23a9d9a65573da879
+2018-11-27 dbba3d4a49f2beb3da31c61d08008fb2db875083
--- a/repos/base-hw/recipes/src/base-hw-rpi/content.mk
+++ b/repos/base-hw/recipes/src/base-hw-rpi/content.mk
@@ -0,0 +1,5 @@
+include $(GENODE_DIR)/repos/base-hw/recipes/src/base-hw_content.inc
+
+content: enable_board_spec
+enable_board_spec: etc/specs.conf
+	echo "SPECS += rpi" >> etc/specs.conf
--- a/repos/base-hw/recipes/src/base-hw-rpi/hash
+++ b/repos/base-hw/recipes/src/base-hw-rpi/hash
@@ -0,0 +1 @@
+2018-11-27 1471d789821119a38fc4ebc08ad99695206f62e4
--- a/repos/base-hw/recipes/src/base-hw-rpi/used_apis
+++ b/repos/base-hw/recipes/src/base-hw-rpi/used_apis
@@ -0,0 +1,2 @@
+base-hw
+base
--- a/repos/base-hw/recipes/src/base-hw-wand_quad/content.mk
+++ b/repos/base-hw/recipes/src/base-hw-wand_quad/content.mk
@@ -0,0 +1,5 @@
+include $(GENODE_DIR)/repos/base-hw/recipes/src/base-hw_content.inc
+
+content: enable_board_spec
+enable_board_spec: etc/specs.conf
+	echo "SPECS += wand_quad" >> etc/specs.conf
--- a/repos/base-hw/recipes/src/base-hw-wand_quad/hash
+++ b/repos/base-hw/recipes/src/base-hw-wand_quad/hash
@@ -0,0 +1 @@
+2018-11-27 84dbb21342c6ce592304e0ded4bd0c309d1daf6a
--- a/repos/base-hw/recipes/src/base-hw-wand_quad/used_apis
+++ b/repos/base-hw/recipes/src/base-hw-wand_quad/used_apis
@@ -0,0 +1,2 @@
+base-hw
+base
--- a/repos/base-hw/src/bootstrap/platform.cc
+++ b/repos/base-hw/src/bootstrap/platform.cc
@@ -163,7 +163,6 @@ static constexpr Genode::Boot_modules_header & header() {
 Platform::Platform()
 : bootstrap_region((addr_t)&_prog_img_beg,
                   ((addr_t)&_prog_img_end - (addr_t)&_prog_img_beg)),
-  core_pd(ram_alloc),
  core_elf_addr(header().base),
  core_elf(core_elf_addr)
 {
--- a/repos/base-hw/src/bootstrap/platform.h
+++ b/repos/base-hw/src/bootstrap/platform.h
@@ -127,7 +127,7 @@ class Bootstrap::Platform
 		Bootstrap::Pic            pic       { };
 		Ram_allocator             ram_alloc { };
 		Memory_region const       bootstrap_region;
-		Genode::Constructible<Pd> core_pd;
+		Genode::Constructible<Pd> core_pd { };
 		addr_t                    core_elf_addr;
 		Elf                       core_elf;

--- a/repos/base-hw/src/bootstrap/spec/arm/cortex_a9_actlr.h
+++ b/repos/base-hw/src/bootstrap/spec/arm/cortex_a9_actlr.h
@@ -20,11 +20,19 @@ namespace Bootstrap { struct Actlr; }

 struct Bootstrap::Actlr : Bootstrap::Cpu::Actlr
 {
-	struct Smp : Bitfield<6, 1> { };
+	struct Fw                 : Bitfield<0, 1> { };
+	struct L2_prefetch_enable : Bitfield<1, 1> { };
+	struct L1_prefetch_enable : Bitfield<2, 1> { };
+	struct Write_full_line    : Bitfield<3, 1> { };
+	struct Smp                : Bitfield<6, 1> { };

 	static void enable_smp()
 	{
 		auto v = read();
+		Fw::set(v, 1);
+		L1_prefetch_enable::set(v, 1);
+		L2_prefetch_enable::set(v, 1);
+		Write_full_line::set(v, 1);
 		Smp::set(v, 1);
 		write(v);
 	}
--- a/repos/base-hw/src/bootstrap/spec/arm/crt0.s
+++ b/repos/base-hw/src/bootstrap/spec/arm/crt0.s
@@ -62,6 +62,22 @@
 	add sp, r0, r1


+	/****************
+	 ** Enable VFP **
+	 ****************/
+
+	mov r0, #0xf
+	lsl r0, #20
+	mcr p15, 0, r0, c1, c0, 2   /* write to CPACR to enable VFP access */
+	mcr p15, 0, r0, c7, c5, 4   /* deprecated ISB instruction <= ARMv6 */
+
+	vmrs r0, fpexc              /* enable the VFP by read/write fpexc  */
+	mov  r1, #1                 /* enable bit 30                       */
+	lsl  r1, #30
+	orr  r0, r1
+	vmsr fpexc, r0
+
+
 	/************************************
 	 ** Jump to high-level entry point **
 	 ************************************/
--- a/repos/base-hw/src/bootstrap/spec/panda/board.h
+++ b/repos/base-hw/src/bootstrap/spec/panda/board.h
@@ -56,15 +56,15 @@ class Board::L2_cache : Hw::Pl310
 		unsigned long _init_value()
 		{
 			Aux::access_t v = 0;
-			Aux::Associativity::set(v, 1);
-			Aux::Way_size::set(v, 3);
-			Aux::Share_override::set(v, 1);
-			Aux::Reserved::set(v, 1);
-			Aux::Ns_lockdown::set(v, 1);
-			Aux::Ns_irq_ctrl::set(v, 1);
-			Aux::Data_prefetch::set(v, 1);
-			Aux::Inst_prefetch::set(v, 1);
-			Aux::Early_bresp::set(v, 1);
+			Aux::Associativity::set(v, Aux::Associativity::WAY_16);
+			Aux::Way_size::set(v, Aux::Way_size::KB_64);
+			Aux::Share_override::set(v, true);
+			Aux::Replacement_policy::set(v, Aux::Replacement_policy::PRAND);
+			Aux::Ns_lockdown::set(v,   true);
+			Aux::Ns_irq_ctrl::set(v,   true);
+			Aux::Data_prefetch::set(v, true);
+			Aux::Inst_prefetch::set(v, true);
+			Aux::Early_bresp::set(v,   true);
 			return v;
 		}

--- a/repos/base-hw/src/bootstrap/spec/wand_quad/board.h
+++ b/repos/base-hw/src/bootstrap/spec/wand_quad/board.h
@@ -28,7 +28,7 @@ namespace Board {

 	using namespace Wand_quad;

-	using L2_cache = Hw::Pl310;
+	struct L2_cache;
 	using Cpu_mmio = Hw::Cortex_a9_mmio<CORTEX_A9_PRIVATE_MEM_BASE>;
 	using Serial   = Genode::Imx_uart;

@@ -38,4 +38,51 @@ namespace Board {
 	};
 }

+struct Board::L2_cache : Hw::Pl310
+{
+	L2_cache(Genode::addr_t mmio) : Hw::Pl310(mmio)
+	{
+		Aux::access_t aux = 0;
+		Aux::Full_line_of_zero::set(aux, true);
+		Aux::Associativity::set(aux, Aux::Associativity::WAY_16);
+		Aux::Way_size::set(aux, Aux::Way_size::KB_64);
+		Aux::Share_override::set(aux, true);
+		Aux::Replacement_policy::set(aux, Aux::Replacement_policy::PRAND);
+		Aux::Ns_lockdown::set(aux, true);
+		Aux::Data_prefetch::set(aux, true);
+		Aux::Inst_prefetch::set(aux, true);
+		Aux::Early_bresp::set(aux, true);
+		write<Aux>(aux);
+
+		Tag_ram::access_t tag_ram = 0;
+		Tag_ram::Setup_latency::set(tag_ram, 2);
+		Tag_ram::Read_latency::set(tag_ram, 3);
+		Tag_ram::Write_latency::set(tag_ram, 1);
+		write<Tag_ram>(tag_ram);
+
+		Data_ram::access_t data_ram = 0;
+		Data_ram::Setup_latency::set(data_ram, 2);
+		Data_ram::Read_latency::set(data_ram, 3);
+		Data_ram::Write_latency::set(data_ram, 1);
+		write<Data_ram>(data_ram);
+
+		Prefetch_ctrl::access_t prefetch = 0;
+		Prefetch_ctrl::Data_prefetch::set(prefetch, 1);
+		Prefetch_ctrl::Inst_prefetch::set(prefetch, 1);
+		write<Prefetch_ctrl>(prefetch | 0xF);
+	}
+
+	using Hw::Pl310::invalidate;
+
+	void enable()
+	{
+		Pl310::mask_interrupts();
+		write<Control::Enable>(1);
+	}
+
+	void disable() {
+		write<Control::Enable>(0);
+	}
+};
+
 #endif /* _SRC__BOOTSTRAP__SPEC__WAND_QUAD__BOARD_H_ */
--- a/repos/base-hw/src/bootstrap/spec/wand_quad/platform.cc
+++ b/repos/base-hw/src/bootstrap/spec/wand_quad/platform.cc
@@ -29,6 +29,186 @@ Bootstrap::Platform::Board::Board()
 {
 	Aipstz aipstz_1(AIPS_1_MMIO_BASE);
 	Aipstz aipstz_2(AIPS_2_MMIO_BASE);
+
+	static volatile unsigned long initial_values[][2] {
+		// (IOMUX Controller)
+		{ 0x20e0000, 0x1 },
+		{ 0x20e0004, 0x48643005 },
+		{ 0x20e0008, 0x221 },
+		{ 0x20e000c, 0x1e00040 },
+		{ 0x20e0034, 0x593e4a4 },
+		{ 0x20e004c, 0x0 },
+		{ 0x20e0050, 0x0 },
+		{ 0x20e0054, 0x0 },
+		{ 0x20e0090, 0x1 },
+		{ 0x20e0094, 0x1 },
+		{ 0x20e0098, 0x1 },
+		{ 0x20e00a4, 0x16 },
+		{ 0x20e00a8, 0x4 },
+		{ 0x20e00ac, 0x2 },
+		{ 0x20e00b0, 0x2 },
+		{ 0x20e00b4, 0x2 },
+		{ 0x20e00b8, 0x2 },
+		{ 0x20e00c4, 0x11 },
+		{ 0x20e015c, 0x0 },
+		{ 0x20e0160, 0x0 },
+		{ 0x20e0164, 0x0 },
+		{ 0x20e0168, 0x0 },
+		{ 0x20e016c, 0x0 },
+		{ 0x20e0170, 0x0 },
+		{ 0x20e0174, 0x0 },
+		{ 0x20e0178, 0x0 },
+		{ 0x20e017c, 0x0 },
+		{ 0x20e0180, 0x0 },
+		{ 0x20e0184, 0x0 },
+		{ 0x20e0188, 0x0 },
+		{ 0x20e018c, 0x0 },
+		{ 0x20e0190, 0x0 },
+		{ 0x20e0194, 0x0 },
+		{ 0x20e0198, 0x0 },
+		{ 0x20e019c, 0x0 },
+		{ 0x20e01a0, 0x0 },
+		{ 0x20e01a4, 0x0 },
+		{ 0x20e01a8, 0x0 },
+		{ 0x20e01ac, 0x0 },
+		{ 0x20e01b0, 0x0 },
+		{ 0x20e01b4, 0x0 },
+		{ 0x20e01b8, 0x0 },
+		{ 0x20e01bc, 0x0 },
+		{ 0x20e01c0, 0x0 },
+		{ 0x20e01c4, 0x0 },
+		{ 0x20e01c8, 0x0 },
+		{ 0x20e01cc, 0x0 },
+		{ 0x20e01d4, 0x1 },
+		{ 0x20e01e4, 0x3 },
+		{ 0x20e0220, 0x0 },
+		{ 0x20e0224, 0x3 },
+		{ 0x20e022c, 0x4 },
+		{ 0x20e023c, 0x16 },
+		{ 0x20e0248, 0x12 },
+		{ 0x20e0250, 0x5 },
+		{ 0x20e0264, 0x5 },
+		{ 0x20e0268, 0x4 },
+		{ 0x20e026c, 0x4 },
+		{ 0x20e0270, 0x4 },
+		{ 0x20e0274, 0x4 },
+		{ 0x20e02b8, 0x0 },
+		{ 0x20e0320, 0x2 },
+		{ 0x20e0348, 0x0 },
+		{ 0x20e0354, 0x0 },
+		{ 0x20e0358, 0x0 },
+		{ 0x20e035c, 0x0 },
+		{ 0x20e0360, 0x17059 },
+		{ 0x20e0364, 0x17059 },
+		{ 0x20e0368, 0x17059 },
+		{ 0x20e03a0, 0xf0b0 },
+		{ 0x20e03a4, 0x100b1 },
+		{ 0x20e03a8, 0x100b1 },
+		{ 0x20e03ac, 0x100b1 },
+		{ 0x20e03b8, 0x1b8b1 },
+		{ 0x20e03c0, 0x1b0b1 },
+		{ 0x20e03c4, 0x1b0b1 },
+		{ 0x20e03c8, 0x1b0b1 },
+		{ 0x20e03cc, 0x1b0b1 },
+		{ 0x20e03d8, 0x1b8b1 },
+		{ 0x20e0470, 0x10 },
+		{ 0x20e0474, 0x10 },
+		{ 0x20e0478, 0x10 },
+		{ 0x20e047c, 0x10 },
+		{ 0x20e0484, 0x10 },
+		{ 0x20e0488, 0x10 },
+		{ 0x20e048c, 0x10 },
+		{ 0x20e0490, 0x10 },
+		{ 0x20e0494, 0x10 },
+		{ 0x20e0498, 0x10 },
+		{ 0x20e049c, 0x10 },
+		{ 0x20e04a0, 0x10 },
+		{ 0x20e04a4, 0x10 },
+		{ 0x20e04a8, 0x10 },
+		{ 0x20e04ac, 0x10 },
+		{ 0x20e04b0, 0x10 },
+		{ 0x20e04b4, 0x10 },
+		{ 0x20e04b8, 0x10 },
+		{ 0x20e04bc, 0x10 },
+		{ 0x20e04c0, 0x10 },
+		{ 0x20e04c4, 0x10 },
+		{ 0x20e04c8, 0x10 },
+		{ 0x20e04cc, 0x10 },
+		{ 0x20e04d0, 0x10 },
+		{ 0x20e04d4, 0x10 },
+		{ 0x20e04d8, 0x10 },
+		{ 0x20e04dc, 0x10 },
+		{ 0x20e04e0, 0x10 },
+		{ 0x20e05e8, 0xb0 },
+		{ 0x20e05f0, 0xb0 },
+		{ 0x20e05f4, 0x17059 },
+		{ 0x20e05fc, 0xb0 },
+		{ 0x20e0600, 0xb0b0 },
+		{ 0x20e060c, 0x1b8b1 },
+		{ 0x20e0618, 0x1b0a8 },
+		{ 0x20e0638, 0x130b0 },
+		{ 0x20e063c, 0x110b0 },
+		{ 0x20e0640, 0x130b0 },
+		{ 0x20e0644, 0x130b0 },
+		{ 0x20e064c, 0x1b0b0 },
+		{ 0x20e06a4, 0x10059 },
+		{ 0x20e0704, 0x0 },
+		{ 0x20e0708, 0x1b0b1 },
+		{ 0x20e0738, 0x10059 },
+		{ 0x20e073c, 0x10059 },
+		{ 0x20e0740, 0x17059 },
+		{ 0x20e0744, 0x17059 },
+		{ 0x20e083c, 0x1 },
+		{ 0x20e0870, 0x0 },
+		{ 0x20e0874, 0x0 },
+		{ 0x20e08a8, 0x2 },
+		{ 0x20e08ac, 0x2 },
+		{ 0x20e092c, 0x1 },
+		{ 0x20e0930, 0x1 },
+
+		// (Global Power Controller)
+		{ 0x20dc008, 0x6a23e613 },
+		{ 0x20dc00c, 0xff69b64f },
+		{ 0x20dc010, 0xfffe0003 },
+		{ 0x20dc014, 0xff30f7ff },
+
+		// (Power Management Unit)
+		{ 0x20c8120, 0x11775 },
+		{ 0x20c8140, 0x580016 },
+		{ 0x20c8160, 0x8000000b },
+		{ 0x20c8170, 0xc0672f67 },
+
+		// (Clock Controller Module)
+		{ 0x20c4018, 0x10204 },
+		{ 0x20c402c, 0x7312c1 },
+		{ 0x20c4030, 0x32271f92 },
+		{ 0x20c4034, 0x12680 },
+		{ 0x20c4038, 0x12090 },
+		{ 0x20c4054, 0x78 },
+		{ 0x20c4058, 0x41a0000 },
+		{ 0x20c4060, 0x10e0101 },
+		{ 0x20c4064, 0x2fe62 },
+		{ 0x20c4068, 0xc03f0f },
+		{ 0x20c406c, 0x30fc00 },
+		{ 0x20c4070, 0x3ff0033 },
+		{ 0x20c4074, 0x3ff3303f },
+		{ 0x20c4078, 0x30c300 },
+		{ 0x20c407c, 0xf0000f3 },
+		{ 0x20c4080, 0xc00 },
+		{ 0x20c8000, 0x80002053 },
+		{ 0x20c8020, 0x3040 },
+		{ 0x20c8070, 0x1006 },
+		{ 0x20c80a0, 0x80002031 },
+		{ 0x20c80b0, 0x7a120 },
+		{ 0x20c80c0, 0xf4240 },
+		{ 0x20c80e0, 0x80002003 },
+		{ 0x20c80f0, 0x9391508c },
+		{ 0x20c8100, 0x5058d01b }
+	};
+
+	unsigned num_values = sizeof(initial_values) / (2*sizeof(unsigned long));
+	for (unsigned i = 0; i < num_values; i++)
+		*((volatile unsigned long*)initial_values[i][0]) = initial_values[i][1];
 }


--- a/repos/base-hw/src/core/spec/arm/cpu_support.h
+++ b/repos/base-hw/src/core/spec/arm/cpu_support.h
@@ -58,7 +58,13 @@ struct Genode::Arm_cpu : public Hw::Arm_cpu
 		}
 	};

-	struct alignas(4) Context : Cpu_state
+	struct Fpu_context
+	{
+		uint32_t fpscr { 1UL << 24 }; /* VFP/SIMD - status/control register     */
+		uint64_t d0_d31[32];  /* VFP/SIMD - general purpose registers   */
+	};
+
+	struct alignas(4) Context : Cpu_state, Fpu_context
 	{
 		Context(bool privileged);
 	};
@@ -146,8 +152,6 @@ struct Genode::Arm_cpu : public Hw::Arm_cpu
 	 ** Dummies **
 	 *************/

-	bool retry_undefined_instr(Context&) { return false; }
-
 	/**
 	 * Return kernel name of the executing CPU
 	 */
--- a/repos/base-hw/src/core/spec/arm/exception_vector.s
+++ b/repos/base-hw/src/core/spec/arm/exception_vector.s
@@ -115,6 +115,17 @@
 	stmia r0!, {r1-r3}       /* save pc, cpsr and exception type */
 	clrex                    /* clear exclusive access needed for cmpxchg */
 	cps   #SVC_MODE
+
+	mov   r1, #1             /* clear exception state of the VFP */
+	lsl   r1, #30
+	vmsr  fpexc, r1
+	adr   r1, _fpu_save
+	ldr   r1, [r1]
+	blx   r1
+
+	/*
+	 * Go to kernel entry code
+	 */
 	adr   lr, _kernel_entry
 	ldr   lr, [lr]
 	bx    lr
@@ -122,6 +133,9 @@
 	_kernel_entry:
 	.long kernel

+	_fpu_save:
+	.long vfp_save_fpu_context
+

 .section .text

@@ -133,3 +147,21 @@
 	idle_thread_main:
 	wfi
 	b idle_thread_main
+
+
+	/*****************************
+	 ** kernel to userland switch **
+	 *******************************/
+
+	.global kernel_to_user_context_switch
+	kernel_to_user_context_switch:
+	push  { r0 }
+	mov   r0, r1
+	bl    vfp_load_fpu_context
+	pop   { r0 }
+	mov   sp, r0
+	ldr   lr, [sp, #15*4]
+	ldr   r1, [sp, #16*4]
+	msr   spsr_cxsf, r1
+	ldm   sp, {r0-r14}^
+	subs  pc, lr, #0
--- a/repos/base-hw/src/core/spec/arm/fpu.h
+++ b/repos/base-hw/src/core/spec/arm/fpu.h
@@ -1,255 +0,0 @@
-/*
- * \brief  ARM-specific FPU driver for core
- * \author Stefan Kalkowski
- * \author Martin stein
- * \date   2016-01-19
- */
-
-/*
- * Copyright (C) 2016-2017 Genode Labs GmbH
- *
- * This file is part of the Genode OS framework, which is distributed
- * under the terms of the GNU Affero General Public License version 3.
- */
-
-#ifndef _CORE__SPEC__ARM__FPU_H_
-#define _CORE__SPEC__ARM__FPU_H_
-
-#include <util/register.h>
-
-namespace Genode { class Fpu; }
-
-/**
- * FPU driver for the ARM VFPv3-D16 architecture
- */
-class Genode::Fpu
-{
-	private:
-
-		/**
-		 * Floating-point Status and Control Register
-		 */
-		struct Fpscr : Register<32>
-		{
-			/**
-			 * Read register value
-			 */
-			static access_t read()
-			{
-				/* FIXME: See annotation 1. */
-				access_t v;
-				asm volatile ("mrc p10, 7, %[v], cr1, cr0, 0" : [v] "=r" (v) ::);
-				return v;
-			}
-
-			/**
-			 * Override register value
-			 *
-			 * \param v  write value
-			 */
-			static void write(access_t const v)
-			{
-				/* FIXME: See annotation 1. */
-				asm volatile ("mcr p10, 7, %[v], cr1, cr0, 0" :: [v] "r" (v) :);
-			}
-		};
-
-		/**
-		 * Floating-Point Exception Control register
-		 */
-		struct Fpexc : Register<32>
-		{
-			struct En  : Bitfield<30, 1> { };
-
-			/**
-			 * Read register value
-			 */
-			static access_t read()
-			{
-				/* FIXME: See annotation 1. */
-				access_t v;
-				asm volatile ("mrc p10, 7, %[v], cr8, cr0, 0" : [v] "=r" (v) ::);
-				return v;
-			}
-
-			/**
-			 * Override register value
-			 *
-			 * \param v  write value
-			 */
-			static void write(access_t const v)
-			{
-				/* FIXME: See annotation 1. */
-				asm volatile ("mcr p10, 7, %[v], cr8, cr0, 0" :: [v] "r" (v) :);
-			}
-		};
-
-	public:
-
-		class Context
-		{
-			private:
-
-				/*
-				 * Noncopyable
-				 */
-				Context(Context const &);
-				Context &operator = (Context const &);
-
-				friend class Fpu;
-
-				struct
-				{
-					/* advanced FP/SIMD - system registers */
-					uint32_t fpscr;
-					uint32_t fpexc;
-
-					/* advanced FP/SIMD - general purpose registers d0-d15 */
-					uint64_t d0, d1, d2,  d3,  d4,  d5,  d6,  d7;
-					uint64_t d8, d9, d10, d11, d12, d13, d14, d15;
-				};
-
-				Fpu * _fpu = nullptr;
-
-			public:
-
-				Context() : fpexc(Fpexc::En::bits(1)) { }
-
-				~Context() { if (_fpu) _fpu->unset(*this); }
-		};
-
-	private:
-
-		Context * _context = nullptr;
-
-		/**
-		 * Enable FPU
-		 */
-		void _enable()
-		{
-			Fpexc::access_t fpexc = Fpexc::read();
-			Fpexc::En::set(fpexc, 1);
-			Fpexc::write(fpexc);
-		}
-
-		/**
-		 * Disable FPU
-		 */
-		void _disable()
-		{
-			Fpexc::access_t fpexc = Fpexc::read();
-			Fpexc::En::set(fpexc, 0);
-			Fpexc::write(fpexc);
-		}
-
-		/**
-		 * Save FPU context
-		 */
-		void _save()
-		{
-			/* save system registers */
-			_context->fpexc = Fpexc::read();
-			_context->fpscr = Fpscr::read();
-
-			/*
-			 * Save D0 - D15
-			 *
-			 * FIXME: See annotation 2.
-			 */
-			void * const d0_d15_base = &_context->d0;
-			asm volatile (
-				"stc p11, cr0, [%[d0_d15_base]], #128"
-				:: [d0_d15_base] "r" (d0_d15_base) : );
-		}
-
-		/**
-		 * Load context to FPU
-		 */
-		void _load()
-		{
-			/* load system registers */
-			Fpexc::write(_context->fpexc);
-			Fpscr::write(_context->fpscr);
-
-			/*
-			 * Load D0 - D15
-			 *
-			 * FIXME: See annotation 2.
-			 */
-			void * const d0_d15_base = &_context->d0;
-			asm volatile (
-				"ldc p11, cr0, [%[d0_d15_base]], #128"
-				:: [d0_d15_base] "r" (d0_d15_base) : );
-		}
-
-		/**
-		 * Return wether the FPU is enabled
-		 */
-		bool _enabled()
-		{
-			Fpexc::access_t fpexc = Fpexc::read();
-			return Fpexc::En::get(fpexc);
-		}
-
-	public:
-
-		/**
-		 * Initialize FPU
-		 */
-		void init();
-
-		void switch_to(Context & context)
-		{
-			if (_context == &context) return;
-			_disable();
-		}
-
-		/**
-		 * Return wether the FPU fault can be solved
-		 *
-		 * \param state  CPU state of the user
-		 */
-		bool fault(Context & context)
-		{
-			if (_enabled()) { return false; }
-			_enable();
-			if (_context != &context) {
-				if (_context) {
-					_save();
-					_context->_fpu = nullptr;
-				}
-				_context = &context;
-				_context->_fpu = this;
-				_load();
-			}
-			return true;
-		}
-
-		/**
-		 * Unset FPU context
-		 */
-		void unset(Context &context) {
-			if (_context == &context) _context = nullptr; }
-};
-
-/*
- * Annotation 1
- *
- *  According to the ARMv7 manual this should be done via vmsr/vmrs instruction
- *  but it seems that binutils 2.22 doesn't fully support this yet. Hence, we
- *  use a co-processor instruction instead. The parameters to target the
- *  register this way can be determined via 'sys/arm/include/vfp.h' and
- *  'sys/arm/arm/vfp.c' of the FreeBSD head branch as from 2014.04.17.
- */
-
-/*
- * Annotation 2
- *
- *  According to the ARMv7 manual this should be done via vldm/vstm instruction
- *  but it seems that binutils 2.22 doesn't fully support this yet. Hence, we
- *  use a co-processor instruction instead. The parameters to target the
- *  register this way can be determined via 'sys/arm/arm/vfp.c' of the FreeBSD
- *  head branch as from 2014.04.17.
- */
-
-#endif /* _CORE__SPEC__ARM__FPU_H_ */
--- a/repos/base-hw/src/core/spec/arm/kernel/thread.cc
+++ b/repos/base-hw/src/core/spec/arm/kernel/thread.cc
@@ -19,6 +19,9 @@

 using namespace Kernel;

+extern "C" void kernel_to_user_context_switch(Cpu::Context*, Cpu::Fpu_context*);
+
+
 void Thread::exception(Cpu & cpu)
 {
 	switch (regs->cpu_exception) {
@@ -34,7 +37,6 @@ void Thread::exception(Cpu & cpu)
 		_interrupt(cpu.id());
 		return;
 	case Cpu::Context::UNDEFINED_INSTRUCTION:
-		if (_cpu->retry_undefined_instr(*regs)) { return; }
 		Genode::warning(*this, ": undefined instruction at ip=",
 		                Genode::Hex(regs->ip));
 		_die();
@@ -106,14 +108,8 @@ void Thread::proceed(Cpu & cpu)
 	cpu.switch_to(*regs, pd()->mmu_regs);

 	regs->cpu_exception = cpu.stack_start();
-
-	asm volatile("mov  sp, %0        \n"
-	             "msr  spsr_cxsf, %1 \n"
-	             "mov  lr, %2        \n"
-	             "ldm  sp, {r0-r14}^ \n"
-	             "subs pc, lr, #0    \n"
-	             :: "r" (static_cast<Cpu::Context*>(&*regs)),
-	                "r" (regs->cpsr), "r" (regs->ip));
+	kernel_to_user_context_switch((static_cast<Cpu::Context*>(&*regs)),
+	                              (static_cast<Cpu::Fpu_context*>(&*regs)));
 }


--- a/repos/base-hw/src/core/spec/arm/vfpv2.s
+++ b/repos/base-hw/src/core/spec/arm/vfpv2.s
@@ -0,0 +1,31 @@
+/*
+ * \brief  VFPv2 context load/store
+ * \author Stefan Kalkowski
+ * \date   2018-05-06
+ */
+
+/*
+ * Copyright (C) 2018 Genode Labs GmbH
+ *
+ * This file is part of the Genode OS framework, which is distributed
+ * under the terms of the GNU Affero General Public License version 3.
+ */
+
+.section .text
+
+.global vfp_save_fpu_context
+vfp_save_fpu_context:
+	vmrs   r1, fpscr
+	stmia  r0!, {r1}
+	vstm   r0!, {d0-d15}
+	mov    pc, lr
+
+
+.global vfp_load_fpu_context
+vfp_load_fpu_context:
+	push { r1, lr }
+	ldr  r1, [r0]
+	vmsr fpscr, r1
+	add  r1, r0, #4
+	vldm r1!, {d0-d15}
+	pop  { r1, pc }
--- a/repos/base-hw/src/core/spec/arm/vfpv3-d32.s
+++ b/repos/base-hw/src/core/spec/arm/vfpv3-d32.s
@@ -0,0 +1,34 @@
+/*
+ * \brief  VFPv3-D32 context load/store
+ * \author Stefan Kalkowski
+ * \date   2018-05-06
+ */
+
+/*
+ * Copyright (C) 2018 Genode Labs GmbH
+ *
+ * This file is part of the Genode OS framework, which is distributed
+ * under the terms of the GNU Affero General Public License version 3.
+ */
+
+.section .text
+
+.global vfp_save_fpu_context
+vfp_save_fpu_context:
+	push   { r1, lr }
+	vmrs   r1, fpscr
+	stmia  r0!, {r1}
+	vstm   r0!, {d0-d15}
+	vstm   r0!, {d16-d31}
+	pop    { r1, pc }
+
+
+.global vfp_load_fpu_context
+vfp_load_fpu_context:
+	push { r1, lr }
+	ldr  r1, [r0]
+	vmsr fpscr, r1
+	add  r1, r0, #4
+	vldm r1!, {d0-d15}
+	vldm r1!, {d16-d31}
+	pop  { r1, pc }
--- a/repos/base-hw/src/core/spec/arm_v7/trustzone/exception_vector.s
+++ b/repos/base-hw/src/core/spec/arm_v7/trustzone/exception_vector.s
@@ -69,10 +69,14 @@ monitor_mode_exception_vector:
 	_nonsecure_kernel_entry:
 	ldr   lr, [sp, #17*4]         /* load kernel sp from vm context  */
 	stmia r0!, {r1-r2}            /* save spsr, and exception reason */
+	mov   r1, #1                  /* clear exception state of the VFP */
+	lsl   r1, #30
+	vmsr  fpexc, r1
 	mrc   p15, 0, r3, c6, c0, 0   /* move DFAR  to r3                */
 	mrc   p15, 0, r4, c2, c0, 0   /* move TTBR0 to r4                */
 	mrc   p15, 0, r5, c2, c0, 1   /* move TTBR1 to r5                */
 	mrc   p15, 0, r6, c2, c0, 2   /* move TTBRC to r6                */
+	vmrs  r7, fpscr               /* move FPU ctrl to r7             */
 	mov   r1, #0
 	mcr   p15, 0, r1, c1, c1, 0   /* disable non-secure bit          */
 	.irp mode,27,19,23,18,17      /* save mode specific registers    */
@@ -81,7 +85,9 @@ monitor_mode_exception_vector:
 		stmia r0!, {r1,sp,lr}     /* store mode-specific sp and lr   */
 	.endr
 	stmia r0!, {r8-r12}           /* save fiq r8-r12                 */
-	stmia r0!, {r3-r6}            /* save MMU registers              */
+	stmia r0!, {r3-r7}            /* save MMU registers              */
+	vstm  r0!, {d0-d15}           /* save FPU registers              */
+	vstm  r0!, {d16-d31}
 	cps   #22                     /* switch back to monitor mode     */
 	mov   r0, #0b111010011        /* spsr to SVC mode, irqs masked   */
 	msr   spsr_cxsf, r0
@@ -109,6 +115,12 @@ monitor_mode_enter_normal_world:
 		msr   spsr_cxfs, r2       /* load mode's spsr                */
 	.endr
 	ldmia r0!, {r8 - r12}         /* load fiq r8-r12                 */
+	add   r0, r0, #4*4
+	ldr   r1, [r0]
+	vmsr  fpscr, r1
+	add   r1, r0, #4
+	vldm  r1!, {d0-d15}
+	vldm  r1!, {d16-d31}
 	cps   #22                     /* switch to monitor mode          */
 	ldmia sp, {r0-lr}^            /* load user r0-r12,sp,lr          */
 	str   lr, [sp, #17*4]         /* store kernel sp in vm context   */
--- a/repos/base-hw/src/core/spec/arm_v7/virtualization/exception_vector.s
+++ b/repos/base-hw/src/core/spec/arm_v7/virtualization/exception_vector.s
@@ -91,11 +91,16 @@ _host_to_vm:
 	mcr   p15, 0, r10, c6, c0, 0  /* write DFAR             */
 	mcr   p15, 0, r11, c6, c0, 2  /* write IFAR             */
 	mcr   p15, 0, r12, c13, c0, 1 /* write CIDR             */
-	ldm   r0, {r1-r4}
+	ldm   r0!, {r1-r4}
 	mcr   p15, 0, r1, c13, c0, 2  /* write TLS1             */
 	mcr   p15, 0, r2, c13, c0, 3  /* write TLS2             */
 	mcr   p15, 0, r3, c13, c0, 4  /* write TLS3             */
 	mcr   p15, 0, r4, c1,  c0, 2  /* write CPACR            */
+	ldr  r1, [r0]
+	vmsr fpscr, r1
+	add  r1, r0, #4
+	vldm r1!, {d0-d15}
+	vldm r1!, {d16-d31}
 	ldmia sp, {r0-r12}            /* load vm's r0-r12       */
 	eret

@@ -106,6 +111,8 @@ _vm_to_host:
 	mcrr p15, 6, r1, r1, c2       /* write VTTBR            */
 	mcr p15, 4, r1, c1, c1, 0     /* write HCR register     */
 	mcr p15, 4, r1, c1, c1, 3     /* write HSTR register    */
+	mov r1, #0xf
+	lsl r1, #20
 	mcr p15, 0, r1, c1, c0, 2     /* write CPACR            */
 	mrs r1, ELR_hyp               /* read ip                */
 	mrs r2, spsr                  /* read cpsr              */
@@ -130,7 +137,15 @@ _vm_to_host:
 	mrc p15, 0, r10, c13, c0, 2   /* read TLS1              */
 	mrc p15, 0, r11, c13, c0, 3   /* read TLS2              */
 	mrc p15, 0, r12, c13, c0, 4   /* read TLS3              */
-	stm r0, {r3-r12}
+	stm r0!, {r3-r12}
+	add    r0, r0, #4
+	mov    r3, #1               /* clear fpu exception state */
+	lsl    r3, #30
+	vmsr   fpexc, r3
+	vmrs   r4, fpscr
+	stmia  r0!, {r4}
+	vstm   r0!, {d0-d15}
+	vstm   r0!, {d16-d31}
 	add r0, sp, #13*4
 	ldr r3, _vt_host_context_ptr
 	ldr sp, [r3]
--- a/repos/base-hw/src/core/spec/cortex_a15/cpu.h
+++ b/repos/base-hw/src/core/spec/cortex_a15/cpu.h
@@ -135,13 +135,6 @@ class Genode::Cpu : public Arm_v7_cpu
 			if (mmu_context.id() && (Ttbr0_64bit::read() != mmu_context.ttbr0))
 				Ttbr0_64bit::write(mmu_context.ttbr0);
 		}
-
-
-		/*************
-		 ** Dummies **
-		 *************/
-
-		bool retry_undefined_instr(Context&) { return false; }
 };

 #endif /* _CORE__SPEC__CORTEX_A15__CPU_H_ */
--- a/repos/base-hw/src/core/spec/cortex_a9/cpu.h
+++ b/repos/base-hw/src/core/spec/cortex_a9/cpu.h
@@ -16,75 +16,43 @@
 #define _CORE__SPEC__CORTEX_A9__CPU_H_

 /* core includes */
-#include <spec/arm/fpu.h>
 #include <spec/arm_v7/cpu_support.h>
 #include <board.h>

-namespace Genode { class Cpu; }
+namespace Genode { struct Cpu; }

-class Genode::Cpu : public Arm_v7_cpu
+struct Genode::Cpu : Arm_v7_cpu
 {
-	protected:
+	/**
+	 * Write back dirty cache lines and invalidate whole data cache
+	 */
+	void clean_invalidate_data_cache()
+	{
+		clean_invalidate_inner_data_cache();
+		Board::l2_cache().clean_invalidate();
+	}

-		Fpu _fpu { };
+	/**
+	 * Invalidate whole data cache
+	 */
+	void invalidate_data_cache()
+	{
+		invalidate_inner_data_cache();
+		Board::l2_cache().invalidate();
+	}

-	public:
+	/**
+	 * Clean and invalidate data-cache for virtual region
+	 * 'base' - 'base + size'
+	 */
+	void clean_invalidate_data_cache_by_virt_region(addr_t base,
+	                                                size_t const size)
+	{
+		Arm_cpu::clean_invalidate_data_cache_by_virt_region(base, size);
+		Board::l2_cache().clean_invalidate();
+	}

-		struct Context : Arm_cpu::Context, Fpu::Context
-		{
-			Context(bool privileged)
-			: Arm_cpu::Context(privileged) {}
-		};
-
-		/**
-		 * Next cpu context to switch to
-		 *
-		 * \param context  context to switch to
-		 */
-		void switch_to(Context & context, Mmu_context & mmu_context)
-		{
-			Arm_cpu::switch_to(context, mmu_context);
-			_fpu.switch_to(context);
-		}
-
-		/**
-		 * Return wether to retry an undefined user instruction after this call
-		 *
-		 * \param state  CPU state of the user
-		 */
-		bool retry_undefined_instr(Context & context) {
-			return _fpu.fault(context); }
-
-		/**
-		 * Write back dirty cache lines and invalidate whole data cache
-		 */
-		void clean_invalidate_data_cache()
-		{
-			clean_invalidate_inner_data_cache();
-			Board::l2_cache().clean_invalidate();
-		}
-
-		/**
-		 * Invalidate whole data cache
-		 */
-		void invalidate_data_cache()
-		{
-			invalidate_inner_data_cache();
-			Board::l2_cache().invalidate();
-		}
-
-		/**
-		 * Clean and invalidate data-cache for virtual region
-		 * 'base' - 'base + size'
-		 */
-		void clean_invalidate_data_cache_by_virt_region(addr_t base,
-		                                                size_t const size)
-		{
-			Arm_cpu::clean_invalidate_data_cache_by_virt_region(base, size);
-			Board::l2_cache().clean_invalidate();
-		}
-
-		static unsigned executing_id() { return Mpidr::Aff_0::get(Mpidr::read()); }
+	static unsigned executing_id() { return Mpidr::Aff_0::get(Mpidr::read()); }
 };

 #endif /* _CORE__SPEC__CORTEX_A9__CPU_H_ */
--- a/repos/base-hw/src/core/spec/cortex_a9/fpu.cc
+++ b/repos/base-hw/src/core/spec/cortex_a9/fpu.cc
@@ -1,24 +0,0 @@
-/*
- * \brief  CPU driver for core
- * \author Martin stein
- * \author Stefan Kalkowski
- * \date   2016-01-19
- */
-
-/*
- * Copyright (C) 2016-2017 Genode Labs GmbH
- *
- * This file is part of the Genode OS framework, which is distributed
- * under the terms of the GNU Affero General Public License version 3.
- */
-
-#include <cpu.h>
-
-void Genode::Fpu::init()
-{
-	Cpu::Cpacr::access_t cpacr = Cpu::Cpacr::read();
-	Cpu::Cpacr::Cp10::set(cpacr, 3);
-	Cpu::Cpacr::Cp11::set(cpacr, 3);
-	Cpu::Cpacr::write(cpacr);
-	_disable();
-}
--- a/repos/base-hw/src/core/spec/cortex_a9/kernel/cpu.cc
+++ b/repos/base-hw/src/core/spec/cortex_a9/kernel/cpu.cc
@@ -23,8 +23,6 @@

 void Kernel::Cpu::init(Kernel::Pic &pic)
 {
-	_fpu.init();
-
 	{
 		Lock::Guard guard(data_lock());

--- a/repos/base-hw/src/core/spec/x86_64/cpu.h
+++ b/repos/base-hw/src/core/spec/x86_64/cpu.h
@@ -116,11 +116,6 @@ class Genode::Cpu : public Hw::X86_64_cpu

 		Fpu & fpu() { return _fpu; }

-		/**
-		 * Return wether to retry an undefined user instruction after this call
-		 */
-		bool retry_undefined_instr(Context&) { return false; }
-
 		/**
 		 * Return kernel name of the executing CPU
 		 */
--- a/repos/base-hw/src/lib/hw/spec/arm/pl310.h
+++ b/repos/base-hw/src/lib/hw/spec/arm/pl310.h
@@ -32,15 +32,52 @@ class Hw::Pl310 : public Genode::Mmio

 		struct Aux : Register<0x104, 32>
 		{
-			struct Associativity  : Bitfield<16,1> { };
-			struct Way_size       : Bitfield<17,3> { };
+			struct Full_line_of_zero : Bitfield<0,1> {};
+
+			struct Associativity : Bitfield<16,1>
+			{
+				enum { WAY_8, WAY_16 };
+			};
+
+			struct Way_size : Bitfield<17,3>
+			{
+				enum {
+					RESERVED,
+					KB_16,
+					KB_32,
+					KB_64,
+					KB_128,
+					KB_256,
+					KB_512
+				};
+			};
+
 			struct Share_override : Bitfield<22,1> { };
-			struct Reserved       : Bitfield<25,1> { };
-			struct Ns_lockdown    : Bitfield<26,1> { };
-			struct Ns_irq_ctrl    : Bitfield<27,1> { };
-			struct Data_prefetch  : Bitfield<28,1> { };
-			struct Inst_prefetch  : Bitfield<29,1> { };
-			struct Early_bresp    : Bitfield<30,1> { };
+
+			struct Replacement_policy : Bitfield<25,1>
+			{
+				enum { ROUND_ROBIN, PRAND };
+			};
+
+			struct Ns_lockdown   : Bitfield<26,1> { };
+			struct Ns_irq_ctrl   : Bitfield<27,1> { };
+			struct Data_prefetch : Bitfield<28,1> { };
+			struct Inst_prefetch : Bitfield<29,1> { };
+			struct Early_bresp   : Bitfield<30,1> { };
+		};
+
+		struct Tag_ram : Register<0x108, 32>
+		{
+			struct Setup_latency : Bitfield<0,3> { };
+			struct Read_latency  : Bitfield<4,3> { };
+			struct Write_latency : Bitfield<8,3> { };
+		};
+
+		struct Data_ram : Register<0x10c, 32>
+		{
+			struct Setup_latency : Bitfield<0,3> { };
+			struct Read_latency  : Bitfield<4,3> { };
+			struct Write_latency : Bitfield<8,3> { };
 		};

 		struct Irq_mask                : Register <0x214, 32> { };
@@ -55,6 +92,12 @@ class Hw::Pl310 : public Genode::Mmio
 			struct Dwb : Bitfield<1,1> { };
 		};

+		struct Prefetch_ctrl : Register<0xf60, 32>
+		{
+			struct Data_prefetch : Bitfield<28,1> { };
+			struct Inst_prefetch : Bitfield<29,1> { };
+		};
+
 		void _sync() { while (read<Cache_sync>()) ; }

 	public:
--- a/repos/base-linux/recipes/api/base-linux/hash
+++ b/repos/base-linux/recipes/api/base-linux/hash
@@ -1 +1 @@
-2018-08-22 ed4d40ace8c08804171ce57f945a31ae096e668f
+2018-11-27 e3975b23b28b50fbb0ca13e8305deb6491f10feb
--- a/repos/base-linux/recipes/src/base-linux/hash
+++ b/repos/base-linux/recipes/src/base-linux/hash
@@ -1 +1 @@
-2018-09-11 44f6a206e43c371e50935e3443e79b4586b4b13b
+2018-11-27 9bc5ae3b23333e187702f57360ecf14c9adb3558
--- a/repos/base-linux/src/core/linux/target.mk
+++ b/repos/base-linux/src/core/linux/target.mk
@@ -33,6 +33,7 @@ SRC_CC        = main.cc \
                core_log_out.cc \
                default_log.cc \
                env_reinit.cc \
+                heartbeat.cc \
                thread.cc thread_myself.cc

 INC_DIR      += $(REP_DIR)/src/core/include \
@@ -65,6 +66,7 @@ vpath signal_receiver.cc          $(GEN_CORE_DIR)
 vpath trace_session_component.cc  $(GEN_CORE_DIR)
 vpath core_rpc_cap_alloc.cc       $(GEN_CORE_DIR)
 vpath default_log.cc              $(GEN_CORE_DIR)
+vpath heartbeat.cc                $(GEN_CORE_DIR)
 vpath thread.cc                   $(BASE_DIR)/src/lib/base
 vpath thread_myself.cc            $(BASE_DIR)/src/lib/base
 vpath trace.cc                    $(BASE_DIR)/src/lib/base
--- a/repos/base-linux/src/lib/syscall/linux_syscalls.h
+++ b/repos/base-linux/src/lib/syscall/linux_syscalls.h
@@ -44,6 +44,7 @@
 #define size_t __SIZE_TYPE__

 /* Linux includes */
+#include <sys/cdefs.h>   /* include first to avoid double definition of '__always_inline' */
 #include <linux/futex.h>
 #include <unistd.h>
 #include <signal.h>
--- a/repos/base-nova/lib/mk/core-nova.inc
+++ b/repos/base-nova/lib/mk/core-nova.inc
@@ -40,7 +40,8 @@ SRC_CC      += stack_area.cc \
               bios_data_area.cc \
               trace_session_component.cc \
               signal_transmitter_noinit.cc \
-               signal_receiver.cc
+               signal_receiver.cc \
+               heartbeat.cc

 INC_DIR      = $(REP_DIR)/src/core/include \
               $(REP_DIR)/src/include \
@@ -73,4 +74,5 @@ vpath dump_alloc.cc                $(GEN_CORE_DIR)
 vpath platform_rom_modules.cc      $(GEN_CORE_DIR)
 vpath platform_services.cc         $(GEN_CORE_DIR)/spec/x86
 vpath stack_area.cc                $(GEN_CORE_DIR)
+vpath heartbeat.cc                 $(GEN_CORE_DIR)
 vpath %.cc                         $(REP_DIR)/src/core
--- a/repos/base-nova/ports/nova.hash
+++ b/repos/base-nova/ports/nova.hash
@@ -1 +1 @@
-95f7056d34c5d48ef9dfbf67f5053fd0486e47b8
+d31259810f0f2b08e41bc9aa89a445ae22794d20
--- a/repos/base-nova/ports/nova.port
+++ b/repos/base-nova/ports/nova.port
@@ -4,7 +4,7 @@ DOWNLOADS := nova.git

 # r10 branch
 URL(nova) := https://github.com/alex-ab/NOVA.git
-REV(nova) := b156131007c928e2968fc5e551cea402c1886919
+REV(nova) := 27a54981ac0baf0e4e048f5d5ad98fe9c605c35a
 DIR(nova) := src/kernel/nova

 PATCHES   := $(sort $(wildcard $(REP_DIR)/patches/*.patch))
--- a/repos/base-nova/recipes/src/base-nova/hash
+++ b/repos/base-nova/recipes/src/base-nova/hash
@@ -1 +1 @@
-2018-09-19 50a7c1db85cd1cfc2c39ae67d05182329d1abed5
+2018-11-27 f935610963309ea600504f10913af99350d481f9
--- a/repos/base-nova/src/core/include/nova_util.h
+++ b/repos/base-nova/src/core/include/nova_util.h
@@ -164,6 +164,9 @@ inline int map_local(Genode::addr_t const pd, Nova::Utcb *utcb,
 		if ((to_end - to_curr) < (1UL << order))
 			order = log2(to_end - to_curr);

+		if (order >= sizeof(void *)*8)
+			return 1;
+
 		int const res = map_local(pd, utcb,
 		                          Mem_crd((from_curr >> 12), order - get_page_size_log2(), permission),
 		                          Mem_crd((to_curr   >> 12), order - get_page_size_log2(), permission),
--- a/repos/base-nova/src/core/platform.cc
+++ b/repos/base-nova/src/core/platform.cc
@@ -660,76 +660,84 @@ Platform::Platform() :
 		/* export x86 platform specific infos */

 		unsigned const pages = 1;
-		void * phys_ptr = 0;
-		ram_alloc()->alloc_aligned(get_page_size(), &phys_ptr, get_page_size_log2());
-		addr_t const phys_addr = reinterpret_cast<addr_t>(phys_ptr);
-		addr_t const core_local_addr = _map_pages(phys_addr, pages);
+		void * phys_ptr = nullptr;
+		if (ram_alloc()->alloc_aligned(get_page_size(), &phys_ptr,
+		                               get_page_size_log2()).ok()) {

-		Genode::Xml_generator xml(reinterpret_cast<char *>(core_local_addr),
-		                          pages << get_page_size_log2(),
-		                          "platform_info", [&] ()
-		{
-			xml.node("acpi", [&] () {
+			addr_t const phys_addr = reinterpret_cast<addr_t>(phys_ptr);
+			addr_t const core_local_addr = _map_pages(phys_addr, pages);

-				xml.attribute("revision", 2); /* XXX */
+			if (!core_local_addr) {
+				ram_alloc()->free(phys_ptr);
+			} else {

-				if (rsdt)
-					xml.attribute("rsdt", String<32>(Hex(rsdt)));
+				Genode::Xml_generator xml(reinterpret_cast<char *>(core_local_addr),
+				                          pages << get_page_size_log2(),
+				                          "platform_info", [&] ()
+				{
+					xml.node("acpi", [&] () {

-				if (xsdt)
-					xml.attribute("xsdt", String<32>(Hex(xsdt)));
-			});
-			xml.node("boot", [&] () {
-				if (!boot_fb)
-					return;
+						xml.attribute("revision", 2); /* XXX */

-				if (!efi_boot && (Resolution::Type::get(boot_fb->size) != Resolution::Type::VGA_TEXT))
-					return;
+						if (rsdt)
+							xml.attribute("rsdt", String<32>(Hex(rsdt)));

-				xml.node("framebuffer", [&] () {
-					xml.attribute("phys",   String<32>(Hex(boot_fb->addr)));
-					xml.attribute("width",  Resolution::Width::get(boot_fb->size));
-					xml.attribute("height", Resolution::Height::get(boot_fb->size));
-					xml.attribute("bpp",    Resolution::Bpp::get(boot_fb->size));
-					xml.attribute("type",   Resolution::Type::get(boot_fb->size));
-					xml.attribute("pitch",  boot_fb->aux);
-				});
-			});
-			xml.node("hardware", [&] () {
-				xml.node("features", [&] () {
-					xml.attribute("svm", hip->has_feature_svm());
-					xml.attribute("vmx", hip->has_feature_vmx());
-				});
-				xml.node("tsc", [&] () {
-					xml.attribute("invariant", cpuid_invariant_tsc());
-					xml.attribute("freq_khz" , hip->tsc_freq);
-				});
-				xml.node("cpus", [&] () {
-					unsigned const cpus = hip->cpus();
-					for (unsigned i = 0; i < cpus; i++) {
-						xml.node("cpu", [&] () {
-							unsigned const kernel_cpu_id = Platform::kernel_cpu_id(i);
-							xml.attribute("id",       i);
-							xml.attribute("package",  hip->cpu_desc_of_cpu(kernel_cpu_id)->package);
-							xml.attribute("core",     hip->cpu_desc_of_cpu(kernel_cpu_id)->core);
-							xml.attribute("thread",   hip->cpu_desc_of_cpu(kernel_cpu_id)->thread);
-							xml.attribute("family",   String<5>(Hex(hip->cpu_desc_of_cpu(kernel_cpu_id)->family)));
-							xml.attribute("model",    String<5>(Hex(hip->cpu_desc_of_cpu(kernel_cpu_id)->model)));
-							xml.attribute("stepping", String<5>(Hex(hip->cpu_desc_of_cpu(kernel_cpu_id)->stepping)));
-							xml.attribute("platform", String<5>(Hex(hip->cpu_desc_of_cpu(kernel_cpu_id)->platform)));
-							xml.attribute("patch",    String<12>(Hex(hip->cpu_desc_of_cpu(kernel_cpu_id)->patch)));
+						if (xsdt)
+							xml.attribute("xsdt", String<32>(Hex(xsdt)));
+					});
+					xml.node("boot", [&] () {
+						if (!boot_fb)
+							return;
+
+						if (!efi_boot && (Resolution::Type::get(boot_fb->size) != Resolution::Type::VGA_TEXT))
+							return;
+
+						xml.node("framebuffer", [&] () {
+							xml.attribute("phys",   String<32>(Hex(boot_fb->addr)));
+							xml.attribute("width",  Resolution::Width::get(boot_fb->size));
+							xml.attribute("height", Resolution::Height::get(boot_fb->size));
+							xml.attribute("bpp",    Resolution::Bpp::get(boot_fb->size));
+							xml.attribute("type",   Resolution::Type::get(boot_fb->size));
+							xml.attribute("pitch",  boot_fb->aux);
 						});
-					}
+					});
+					xml.node("hardware", [&] () {
+						xml.node("features", [&] () {
+							xml.attribute("svm", hip->has_feature_svm());
+							xml.attribute("vmx", hip->has_feature_vmx());
+						});
+						xml.node("tsc", [&] () {
+							xml.attribute("invariant", cpuid_invariant_tsc());
+							xml.attribute("freq_khz" , hip->tsc_freq);
+						});
+						xml.node("cpus", [&] () {
+							unsigned const cpus = hip->cpus();
+							for (unsigned i = 0; i < cpus; i++) {
+								xml.node("cpu", [&] () {
+									unsigned const kernel_cpu_id = Platform::kernel_cpu_id(i);
+									xml.attribute("id",       i);
+									xml.attribute("package",  hip->cpu_desc_of_cpu(kernel_cpu_id)->package);
+									xml.attribute("core",     hip->cpu_desc_of_cpu(kernel_cpu_id)->core);
+									xml.attribute("thread",   hip->cpu_desc_of_cpu(kernel_cpu_id)->thread);
+									xml.attribute("family",   String<5>(Hex(hip->cpu_desc_of_cpu(kernel_cpu_id)->family)));
+									xml.attribute("model",    String<5>(Hex(hip->cpu_desc_of_cpu(kernel_cpu_id)->model)));
+									xml.attribute("stepping", String<5>(Hex(hip->cpu_desc_of_cpu(kernel_cpu_id)->stepping)));
+									xml.attribute("platform", String<5>(Hex(hip->cpu_desc_of_cpu(kernel_cpu_id)->platform)));
+									xml.attribute("patch",    String<12>(Hex(hip->cpu_desc_of_cpu(kernel_cpu_id)->patch)));
+								});
+							}
+						});
+					});
 				});
-			});
-		});

-		unmap_local(__main_thread_utcb, core_local_addr, pages);
-		region_alloc()->free(reinterpret_cast<void *>(core_local_addr), pages * get_page_size());
+				unmap_local(__main_thread_utcb, core_local_addr, pages);
+				region_alloc()->free(reinterpret_cast<void *>(core_local_addr), pages * get_page_size());

-		_rom_fs.insert(new (core_mem_alloc())
-		               Rom_module(phys_addr, pages * get_page_size(),
-		               "platform_info"));
+				_rom_fs.insert(new (core_mem_alloc())
+				               Rom_module(phys_addr, pages * get_page_size(),
+				               "platform_info"));
+			}
+		}
 	}

 	/* core log as ROM module */
@@ -738,16 +746,22 @@ Platform::Platform() :
 		unsigned const pages  = 4;
 		size_t const log_size = pages << get_page_size_log2();

-		ram_alloc()->alloc_aligned(log_size, &phys_ptr, get_page_size_log2());
-		addr_t const phys_addr = reinterpret_cast<addr_t>(phys_ptr);
+		if (ram_alloc()->alloc_aligned(log_size, &phys_ptr,
+		                               get_page_size_log2()).ok()) {

-		addr_t const core_local_addr = _map_pages(phys_addr, pages, true);
-		memset(reinterpret_cast<void *>(core_local_addr), 0, log_size);
+			addr_t const phys_addr = reinterpret_cast<addr_t>(phys_ptr);

-		_rom_fs.insert(new (core_mem_alloc()) Rom_module(phys_addr, log_size,
-		                                                 "core_log"));
+			addr_t const virt = _map_pages(phys_addr, pages, true);
+			if (virt) {
+				memset(reinterpret_cast<void *>(virt), 0, log_size);

-		init_core_log( Core_log_range { core_local_addr, log_size } );
+				_rom_fs.insert(new (core_mem_alloc()) Rom_module(phys_addr, log_size,
+				                                                 "core_log"));
+
+				init_core_log( Core_log_range { virt, log_size } );
+			} else
+				ram_alloc()->free(phys_ptr);
+		}
 	}

 	/* export hypervisor log memory */
@@ -771,12 +785,19 @@ Platform::Platform() :
 	unsigned index = first_index;
 	for (unsigned i = 0; i < 32; i++)
 	{
-		void * phys_ptr = 0;
-		ram_alloc()->alloc_aligned(get_page_size(), &phys_ptr, get_page_size_log2());
+		void * phys_ptr = nullptr;
+		if (ram_alloc()->alloc_aligned(get_page_size(), &phys_ptr,
+		                               get_page_size_log2()).error())
+			break;

 		addr_t phys_addr = reinterpret_cast<addr_t>(phys_ptr);
 		addr_t core_local_addr = _map_pages(phys_addr, 1);
-		
+
+		if (!core_local_addr) {
+			ram_alloc()->free(phys_ptr);
+			break;
+		}
+
 		Cap_range * range = reinterpret_cast<Cap_range *>(core_local_addr);
 		construct_at<Cap_range>(range, index);

--- a/repos/base-nova/src/lib/base/cap_map.cc
+++ b/repos/base-nova/src/lib/base/cap_map.cc
@@ -178,6 +178,12 @@ void Capability_map::remove(Genode::addr_t const sel, uint8_t num_log_2,
 	while (last_sel > last_range) {
 		uint8_t left_log2 = log2(last_sel - last_range);

+		/* take care for a case which should not happen */
+		if (left_log2 >= sizeof(last_range)*8) {
+			error("cap remove error");
+			return;
+		}
+
 		remove(last_range, left_log2, revoke);

 		last_range += 1UL << left_log2;
--- a/repos/base-nova/src/lib/base/ipc.cc
+++ b/repos/base-nova/src/lib/base/ipc.cc
@@ -40,8 +40,17 @@ Rpc_exception_code Genode::ipc_call(Native_capability dst,
 	if (rcv_caps != ~0UL) {

 		/* calculate max order of caps to be received during reply */
-		unsigned short log2_max = rcv_caps ? log2(rcv_caps) : 0;
-		if ((1U << log2_max) < rcv_caps) log2_max ++;
+		unsigned short log2_max = 0;
+		if (rcv_caps) {
+			log2_max = log2(rcv_caps);
+
+			/* if this happens, the call is bogus and invalid */
+			if ((log2_max >= sizeof(rcv_caps) * 8))
+				throw Ipc_error();
+
+			if ((1UL << log2_max) < rcv_caps)
+				log2_max ++;
+		}

 		rcv_window.rcv_wnd(log2_max);
 	}
--- a/repos/base-okl4/lib/mk/core-okl4.inc
+++ b/repos/base-okl4/lib/mk/core-okl4.inc
@@ -41,7 +41,8 @@ SRC_CC += stack_area.cc \
          signal_transmitter_proxy.cc \
          signal_receiver.cc \
          thread_start.cc \
-          trace_session_component.cc
+          trace_session_component.cc \
+          heartbeat.cc

 INC_DIR += $(REP_DIR)/src/core/include $(GEN_CORE_DIR)/include \
           $(REP_DIR)/src/include      $(GEN_SRC_DIR)/include
@@ -75,3 +76,4 @@ vpath default_log.cc              $(GEN_CORE_DIR)
 vpath stack_area.cc               $(GEN_CORE_DIR)
 vpath pager_ep.cc                 $(GEN_CORE_DIR)
 vpath platform_rom_modules.cc     $(GEN_CORE_DIR)
+vpath heartbeat.cc                $(GEN_CORE_DIR)
--- a/repos/base-okl4/recipes/src/base-okl4/hash
+++ b/repos/base-okl4/recipes/src/base-okl4/hash
@@ -1 +1 @@
-2018-09-11 8ea606caab24ffc669aeb5d9167d9c6210c2837a
+2018-11-27 f3a807a0f5ee4033f69f2cccc68c4e25554ebcb4
--- a/repos/base-pistachio/lib/mk/core-pistachio.inc
+++ b/repos/base-pistachio/lib/mk/core-pistachio.inc
@@ -39,7 +39,8 @@ SRC_CC       = stack_area.cc \
               signal_transmitter_proxy.cc \
               signal_receiver.cc \
               thread_start.cc \
-               trace_session_component.cc
+               trace_session_component.cc \
+               heartbeat.cc

 INC_DIR     += $(REP_DIR)/src/core/include $(GEN_CORE_DIR)/include \
               $(REP_DIR)/src/include      $(GEN_SRC_DIR)/include
@@ -73,3 +74,4 @@ vpath core_region_map.cc          $(GEN_CORE_DIR)
 vpath stack_area.cc               $(GEN_CORE_DIR)
 vpath pager_ep.cc                 $(GEN_CORE_DIR)
 vpath platform_rom_modules.cc     $(GEN_CORE_DIR)
+vpath heartbeat.cc                $(GEN_CORE_DIR)
--- a/repos/base-pistachio/recipes/src/base-pistachio/hash
+++ b/repos/base-pistachio/recipes/src/base-pistachio/hash
@@ -1 +1 @@
-2018-09-11 471af5922e500c478fa47ac88ea8691841890383
+2018-11-27 8321c99e33f261b6088e6375256815590f1d56b3
--- a/repos/base-sel4/lib/mk/core-sel4.inc
+++ b/repos/base-sel4/lib/mk/core-sel4.inc
@@ -21,7 +21,8 @@ GEN_SRC_CC += \
              rom_session_component.cc \
              signal_receiver.cc \
              signal_transmitter_proxy.cc \
-              trace_session_component.cc
+              trace_session_component.cc \
+              heartbeat.cc

 REP_SRC_CC += \
              capability_space.cc \
--- a/repos/base-sel4/recipes/src/base-sel4/hash
+++ b/repos/base-sel4/recipes/src/base-sel4/hash
@@ -1 +1 @@
-2018-09-11 9368374ecf4a0eaca266c3c05f4f6df2a76826e6
+2018-11-27 d6b7a57753b6bcd38bb4e39232497a4e5d455ee9
--- a/repos/base-sel4/src/core/include/ipc_pager.h
+++ b/repos/base-sel4/src/core/include/ipc_pager.h
@@ -93,6 +93,7 @@ class Genode::Ipc_pager : public Native_capability
 		addr_t _fault_type = 0;    /* type of fault */
 		bool   _pf_write = false;  /* true on write fault            */
 		bool   _pf_exec  = false;  /* true on exec  fault            */
+		bool   _pf_align = false;  /* true on unaligned fault */

 		Mapping _reply_mapping { };

@@ -151,6 +152,16 @@ class Genode::Ipc_pager : public Native_capability
 		 * Return true if page fault was on non-executable memory
 		 */
 		bool exec_fault() const { return _pf_exec; }
+
+		/**
+		 * Return true if page fault was due to unaligned memory access
+		 */
+		bool align_fault() const { return _pf_align; }
+
+		/**
+		 * Install memory mapping after pager code executed.
+		 */
+		bool install_mapping();
 };

 #endif /* _CORE__INCLUDE__IPC_PAGER_H_ */
--- a/repos/base-sel4/src/core/include/vm_space.h
+++ b/repos/base-sel4/src/core/include/vm_space.h
@@ -389,22 +389,30 @@ class Genode::Vm_space
 			_cap_sel_alloc.free(_vm_pad_cnode.sel());
 		}

-		void map(addr_t const from_phys, addr_t const to_virt,
+		bool map(addr_t const from_phys, addr_t const to_virt,
 		         size_t const num_pages, Cache_attribute const cacheability,
 		         bool const writable, bool const executable, bool flush_support)
 		{
 			Lock::Guard guard(_lock);

+			bool ok = true;
+
 			for (size_t i = 0; i < num_pages; i++) {
 				off_t const offset = i << get_page_size_log2();

-				if (!_map_frame(from_phys + offset, to_virt + offset,
-				                cacheability, writable, executable,
-				                flush_support))
-					warning("mapping failed ", Hex(from_phys + offset),
-					        " -> ", Hex(to_virt + offset), " ",
-					        !flush_support ? "core" : "");
+				if (_map_frame(from_phys + offset, to_virt + offset,
+				               cacheability, writable, executable,
+				               flush_support))
+					continue;
+
+				ok = false;
+
+				warning("mapping failed ", Hex(from_phys + offset),
+				        " -> ", Hex(to_virt + offset), " ",
+				        !flush_support ? "core" : "");
 			}
+
+			return ok;
 		}

 		bool unmap(addr_t const virt, size_t const num_pages,
--- a/repos/base-sel4/src/core/pager.cc
+++ b/repos/base-sel4/src/core/pager.cc
@@ -47,12 +47,14 @@ void Ipc_pager::wait_for_fault()
 	reply_and_wait_for_fault();
 }

+bool Ipc_pager::install_mapping()
+{
+	_badge = Genode::install_mapping(_reply_mapping, _badge);
+	return _badge;
+}

 void Ipc_pager::reply_and_wait_for_fault()
 {
-	if (_badge)
-		_badge = install_mapping(_reply_mapping, _badge);
-
 	seL4_Word badge = Rpc_obj_key::INVALID;

 	seL4_MessageInfo_t page_fault_msg_info;
@@ -76,6 +78,7 @@ void Ipc_pager::reply_and_wait_for_fault()
 	_pf_write   = fault_info.write;
 	_pf_exec    = fault_info.exec_fault();
 	_fault_type = seL4_MessageInfo_get_label(page_fault_msg_info);
+	_pf_align   = fault_info.align_fault();

 	_badge = badge;
 }
@@ -187,6 +190,23 @@ void Pager_entrypoint::entry()
 				        " ip=", Hex(_pager.fault_ip()),
 				        " pf-addr=", Hex(_pager.fault_addr()));
 				_pager.reply_save_caller(obj->reply_cap_sel());
+				return;
+			}
+
+			try {
+				/* install memory mappings */
+				if (_pager.install_mapping())
+					return;
+
+				/* on alignment fault don't reply and submit signal */
+				if (_pager.align_fault()) {
+					warning("alignment fault, addr=", Hex(_pager.fault_addr()),
+					        " ip=", Hex(_pager.fault_ip()));
+					throw 1;
+				}
+			} catch (...) {
+				reply_pending = false;
+				obj->submit_exception_signal();
 			}
 		});
 	}
--- a/Show More
+++ b/Show More
@@ -1 +1 @@
 .08
 .11
				`@@ -0,0 +1 @@`
				`2018-11-14 778d83a4be78dcd6d1e4d45f1ca103def7b298a5`
				`@@ -0,0 +1 @@`
				`2018-11-27 cf3fa9aa12c4a234c40e274f9f34adf970b8615e`
				`@@ -0,0 +1 @@`
				`2018-11-27 fe18a97034e44fda5a886cb6294ffb9fdfda7069`
				`@@ -0,0 +1 @@`
				`2018-11-27 44cec6d014bd5d259ef484f1926dadf0b86542a9`
				`@@ -1 +0,0 @@`
				`2018-09-11 4e8800fd9dc2adf6abeed5d3eca0a487a1a01cdb`
				`@@ -0,0 +1 @@`
				`2018-11-27 dc9f02e760588af3fb4ca13a253f622713adc4b9`
				`@@ -0,0 +1 @@`
				`2018-11-27 e9d1992511cbde7b6da8dd1a92d8d58f464387bf`
				`@@ -0,0 +1 @@`
				`2018-11-27 b2b1f2c5f590822e2bf29ba0be2c83f134c0de65`
				`@@ -0,0 +1 @@`
				`2018-11-27 4c9b4f2486299c30514fa796d4b6bbc69f5b0c1b`